 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
RA4L1 Datasheet(PDF) 71 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
RA4L1 Datasheet(HTML) 71 Page - Renesas Technology Corp |
|
|
71 / 125 page  2.3.12 I3C Timing Table 2.43 IIC timing(1) Conditions: VCC = AVCC0 = 1.8 to 3.6 V Parameter Symbol Min*1 Max*1 Unit IIC (Standard mode, SMBus) BFCTL.FMPE = 0 SCL input cycle time tSCL 10(18) × tI3Ccyc + 1300 — ns SCL input high pulse width tSCLH 5(9) × tI3Ccyc + 300 — ns SCL input low pulse width tSCLL 5(9) × tI3Ccyc + 300 — ns SCL, SDA rise time tSr — 1000 ns SCL, SDA fall time tSf — 300 ns SCL, SDA input spike pulse removal time tSP 0 1(4) × tI3Ccyc ns SDA input bus free time when wakeup function is disabled tBUF 5(9) × tI3Ccyc + 300 — ns SDA input bus free time when wakeup function is enabled tBUF 5(9) × tI3Ccyc + 4 × tTcyc + 300 — ns START condition input hold time when wakeup function is disabled tSTAH tI3Ccyc + 300 — ns START condition input hold time when wakeup function is enabled tSTAH 1(5) × tI3Ccyc + tTcyc + 300 — ns Repeated START condition input setup time tSTAS 1000 — ns STOP condition input setup time tSTOS 1000 — ns Data input setup time tSDAS tI3Ccyc + 50 — ns Data input hold time tSDAH 0 — ns SCL, SDA capacitive load Cb*2 — 400 pF IIC (Fast-mode) BFCTL.FMPE = 0 SCL input cycle time tSCL 10(18) × tI3Ccyc + 600 — ns SCL input high pulse width tSCLH 5(9) × tI3Ccyc + 300 — ns SCL input low pulse width tSCLL 5(9) × tI3Ccyc + 300 — ns SCL, SDA rise time tSr 20 × (external pullup voltage/5.5 V) 1000 ns SCL, SDA fall time tSf 20 × (external pullup voltage/5.5 V) 300 ns SCL, SDA input spike pulse removal time tSP 0 1(4) × tI3Ccyc ns SDA input bus free time when wakeup function is disabled tBUF 5(9) × tI3Ccyc + 300 — ns SDA input bus free time when wakeup function is enabled tBUF 5(9) × tI3Ccyc + 4 × tTcyc + 300 — ns START condition input hold time when wakeup function is disabled tSTAH tI3Ccyc + 300 — ns START condition input hold time when wakeup function is enabled tSTAH 1(5) × tI3Ccyc + tTcyc + 300 — ns Repeated START condition input setup time tSTAS 300 — ns STOP condition input setup time tSTOS 300 — ns Data input setup time tSDAS tI3Ccyc + 50 — ns Data input hold time tSDAH 0 — ns SCL, SDA capacitive load Cb*2 — 400 pF RA4L1 Datasheet 2. Electrical Characteristics R01DS0447EJ0131 Rev.1.31 May 26, 2026 Page 71 of 125 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
New Zealand ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
