RA4L1 datasheet(44/125 Pages) RENESAS

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2.3.1

Frequency

Table 2.22

Operation frequency in high-speed operating mode

Conditions: VCC = AVCC0 = 1.6 to 3.6 V

Parameter

Symbol

Min

Typ

Max*4

Unit

Operation

frequency

System clock (ICLK)*1 *2

1.8 to 3.6 V

0.03277

—

80*5

MHz

1.6 to 1.8 V

0.03277

—

Peripheral module clock (PCLKA)

1.8 to 3.6 V

—

80*5

1.6 to 1.8 V

—

Peripheral module clock (PCLKB)

1.8 to 3.6 V

—

1.6 to 1.8 V

—

Peripheral module clock (PCLKC)*3

1.8 to 3.6 V

—

1.6 to 1.8 V

—

Peripheral module clock (PCLKD)

1.8 to 3.6 V

—

80*5

1.6 to 1.8 V

—

Flash IF clock (FCLK)

1.8V to 3.6V

—

1.6 to 1.8 V

—

Note:

Set LDOCR.CHG0 = 0 when ICLK < 8MHz, and LDOCR.CHG0 = 1 when 8MHz ≤ ICLK.

Note 1. The lower-limit frequency of ICLK is 1 MHz while programming or erasing the flash memory. When using ICLK for programming or

erasing the flash memory at below 4 MHz, the frequency can be set to 1 MHz, 2 MHz, or 3 MHz. A non-integer frequency such as

1.5 MHz cannot be set.

Note 2. The frequency accuracy of ICLK must be ± 1.0% during programming or erasing the flash memory. Confirm the frequency accuracy

of the clock source.

Note 3. The lower-limit frequency of PCLKD is 1 MHz when the ADC12 is in use.

Note 4. The maximum value of operation frequency does not include internal oscillator errors. For details on the range for guaranteed

operation, see Table 2.26.

Note 5. This is the condition when Tj = 105 °C. Specifications at Tj = 140 °C are 78MHz.

Table 2.23

Operation frequency in middle-speed mode

Conditions: VCC = AVCC0 = 1.6 to 3.6 V

Parameter

Symbol

Min

Typ

Max*4

Unit

Operation

frequency

System clock (ICLK)*1 *2

1.8 to 3.6 V

0.03277

—

MHz

1.6 to 1.8 V

0.03277

—

Peripheral module clock (PCLKA)

1.8 to 3.6 V

—

1.6 to 1.8 V

—

Peripheral module clock (PCLKB)

1.8 to 3.6 V

—

1.6 to 1.8 V

—

Peripheral module clock (PCLKC)*3

1.8 to 3.6 V

—

1.6 to 1.8 V

—

Peripheral module clock (PCLKD)

1.8 to 3.6 V

—

1.6 to 1.8 V

—

Flash IF clock (FCLK)

1.8 to 3.6 V

—

1.6 to 1.8 V

—

Note 1. The lower-limit frequency of ICLK is 1 MHz while programming or erasing the flash memory. When using ICLK for programming or

erasing the flash memory at below 4 MHz, the frequency can be set to 1 MHz, 2 MHz, or 3 MHz. A non-integer frequency such as

1.5 MHz cannot be set.

Note 2. The frequency accuracy of ICLK must be ± 1.0% during programming or erasing the flash memory. Confirm the frequency accuracy

of the clock source.

Note 3. The lower-limit frequency of PCLKC is 1 MHz when the ADC12 is in use.

Note 4. The maximum value of operation frequency does not include internal oscillator errors. For details on the range for guaranteed

operation, see Table 2.26.

RA4L1 Datasheet

2. Electrical Characteristics

R01DS0447EJ0131 Rev.1.31

May 26, 2026

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