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DA7282-00FVC Datasheet(PDF) 48 Page - Renesas Technology Corp |
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DA7282-00FVC Datasheet(HTML) 48 Page - Renesas Technology Corp |
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48 / 75 page ![]() LRA/ERM Ultra-Low Power Haptic Driver with Multiple Input Triggers and Integrated Waveform Memory R15DS0041EE0330 Rev.3.30 June 16, 2026 CFR0011-120-00 Page 48 100 % 0 -100 % 0xF 0xE 0xD . . . 0x2 0x1 0x0 N/A N/A N/A . . . N/A N/A 0x7F 0x7E 0x7D . . . 0x02 0x01 0x00 0xFF 0xFE 0xFD . . . 0x81 0x80 PWM [Mark / space] DRO MEM FULL_BRAKE_THRS[3:0] full brake (only for PWM) Drive positive direction 100% 0% Waveform/Data source Driving Strength in ENV GEN [%] Data format for ERM and LRA ACCELERATION_EN = 1 4 bits uns. 8 bits 2's c. Drive negative direction Figure 32. Overview of data formats with acceleration enabled 6.9.1 DRO Mode DRO data is supplied from I2C and is interpreted as 8-bit two’s complement signed number. ▪ For ACCELERATION_EN = 0: • The most negative value corresponds to -100 % driving strength. • The most positive value corresponds to +100 % driving strength. • A zero value corresponds to no drive. • The full range is between 127 (100 %) and -127 (-100 %), with -128 interpreted as -127 to keep the ranges symmetrical ▪ For ACCELERATION_EN = 1: • Negative values are omitted and substituted with zero. • The most positive value corresponds to +100 % driving strength. • Zero value corresponds to no drive. |
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