DA7282-00FVC datasheet(6/75 Pages) RENESAS

6 / 75 page

LRA/ERM Ultra-Low Power Haptic Driver with Multiple Input Triggers and Integrated Waveform Memory

R15DS0041EE0330 Rev.3.30

June 16, 2026

CFR0011-120-00

Page 6

Table 5. Recommended operating conditions ....................................................................................................... 11

Table 6. Current consumption ............................................................................................................................... 12

Table 7. Electrical characteristics .......................................................................................................................... 12

Table 8. Timing characteristics .............................................................................................................................. 13

Table 9. I2C interface timing requirements ............................................................................................................ 13

Table 10. WLCSP thermal ratings ......................................................................................................................... 14

Table 11. QFN thermal ratings .............................................................................................................................. 14

Table 12. Operating modes ................................................................................................................................... 20

Table 13. Haptic event flag descriptions................................................................................................................ 32

Table 14. Default CUSTOM_WAVE_GEN_COEFFx settings............................................................................... 35

Table 15. LOOP_FILT_CAP_TRIM register trim settings ..................................................................................... 37

Table 16. LOOP_FILT_RES_TRIM register trim settings ..................................................................................... 37

Table 17. VDDIO pin control recommended values of R and C............................................................................ 40

Table 18. PWL byte structure ................................................................................................................................ 42

Table 19. Bit definitions for frame parameters....................................................................................................... 44

Table 20. Register map ......................................................................................................................................... 53

Table 21. CHIP_REV (0x0000).............................................................................................................................. 55

Table 22. IRQ_EVENT1 (0x0003) ......................................................................................................................... 55

Table 23. IRQ_EVENT_WARNING_DIAG (0x0004)............................................................................................. 55

Table 24. IRQ_EVENT_SEQ_DIAG (0x0005)....................................................................................................... 56

Table 25. IRQ_STATUS1 (0x0006)....................................................................................................................... 56

Table 26. IRQ_MASK1 (0x0007)........................................................................................................................... 56

Table 27. CIF_I2C1 (0x0008) ................................................................................................................................ 56

Table 28: FRQ_LRA_PER_H (0x000A) ................................................................................................................ 57

Table 29. FRQ_LRA_PER_L (0x000B) ................................................................................................................. 57

Table 30. ACTUATOR1 (0x000C) ......................................................................................................................... 57

Table 31. ACTUATOR2 (0x000D) ......................................................................................................................... 57

Table 32. ACTUATOR3 (0x000E) ......................................................................................................................... 58

Table 33. CALIB_V2I_H (0x000F)......................................................................................................................... 58

Table 34. CALIB_V2I_L (0x0010).......................................................................................................................... 58

Table 35. CALIB_IMP_H (0x0011) ........................................................................................................................ 58

Table 36. CALIB_IMP_L (0x0012)......................................................................................................................... 59

Table 37. TOP_CFG1 (0x0013) ............................................................................................................................ 59

Table 38. TOP_CFG2 (0x0014) ............................................................................................................................ 59

Table 39. TOP_CFG3 (0x0015) ............................................................................................................................ 60

Table 40. TOP_CFG4 (0x0016) ............................................................................................................................ 60

Table 41. TOP_INT_CFG1 (0x0017)..................................................................................................................... 60

Table 42. TOP_INT_CFG6_H (0x001C) ............................................................................................................... 60

Table 43. TOP_INT_CFG6_L (0x001D) ................................................................................................................ 60

Table 44. TOP_INT_CFG7_H (0x001E)................................................................................................................ 60

Table 45. TOP_INT_CFG7_L (0x001F) ................................................................................................................ 61

Table 46. TOP_INT_CFG8 (0x0020)..................................................................................................................... 61

Table 47. TOP_CTL1 (0x0022) ............................................................................................................................. 61

Table 48. TOP_CTL2 (0x0023) ............................................................................................................................. 61

Table 49. SEQ_CTL1 (0x0024) ............................................................................................................................. 62

Table 50. SWG_C1 (0x0025) ................................................................................................................................ 62

Table 51. SWG_C2 (0x0026) ................................................................................................................................ 62

Table 52. SWG_C3 (0x0027) ................................................................................................................................ 62

DA7282-00FVC Datasheet(PDF) 6 Page - Renesas Technology Corp

DA7282-00FVC Datasheet(HTML) 6 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75

Datasheet Download

Link URL