S9S08QD2CSC datasheet(83/198 Pages) FREESCALE

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Chapter 7 Central Processor Unit (S08CPUV2)

MC9S08QD4 Series MCU Data Sheet, Rev. 6

Freescale Semiconductor

BCLR n,opr8a

Clear Bit n in Memory

(Mn

← 0)

DIR (b0)

DIR (b1)

DIR (b2)

DIR (b3)

DIR (b4)

DIR (b5)

DIR (b6)

DIR (b7)

rfwpp

– – – – – –

BCS rel

Branch if Carry Bit Set (if C = 1)

(Same as BLO)

REL

25 rr

ppp

– – – – – –

BEQ rel

Branch if Equal (if Z = 1)

REL

27 rr

ppp

– – – – – –

BGE rel

Branch if Greater Than or Equal To

(if N

⊕ V = 0) (Signed)

REL

90 rr

ppp

– – – – – –

BGND

Enter active background if ENBDM=1

Waits for and processes BDM commands

until GO, TRACE1, or TAGGO

INH

fp...ppp

– – – – – –

BGT rel

Branch if Greater Than (if Z | (N

⊕ V) = 0)

(Signed)

REL

92 rr

ppp

– – – – – –

BHCC rel

Branch if Half Carry Bit Clear (if H = 0)

REL

28 rr

ppp

– – – – – –

BHCS rel

Branch if Half Carry Bit Set (if H = 1)

REL

29 rr

ppp

– – – – – –

BHI rel

Branch if Higher (if C | Z = 0)

REL

22 rr

ppp

– – – – – –

BHS rel

Branch if Higher or Same (if C = 0)

(Same as BCC)

REL

24 rr

ppp

– – – – – –

BIH rel

Branch if IRQ Pin High (if IRQ pin = 1)

REL

2F rr

ppp

– – – – – –

BIL rel

Branch if IRQ Pin Low (if IRQ pin = 0)

REL

2E rr

ppp

– – – – – –

BIT #opr8i

BIT opr8a

BIT opr16a

BIT oprx16,X

BIT oprx8,X

BIT ,X

BIT oprx16,SP

BIT oprx8,SP

Bit Test

(A) & (M)

(CCR Updated but Operands Not Changed)

IMM

DIR

EXT

IX2

IX1

SP2

SP1

9E D5

9E E5

hh ll

ee ff

rpp

prpp

rpp

rfp

pprpp

prpp

0 – –

–

BLE rel

Branch if Less Than or Equal To

(if Z | (N

⊕ V) = 1) (Signed)

REL

93 rr

ppp

– – – – – –

BLO rel

Branch if Lower (if C = 1) (Same as BCS)

REL

25 rr

ppp

– – – – – –

BLS rel

Branch if Lower or Same (if C | Z = 1)

REL

23 rr

ppp

– – – – – –

BLT rel

Branch if Less Than (if N

⊕ V = 1) (Signed)

REL

91 rr

ppp

– – – – – –

BMC rel

Branch if Interrupt Mask Clear (if I = 0)

REL

2C rr

ppp

– – – – – –

BMI rel

Branch if Minus (if N = 1)

REL

2B rr

ppp

– – – – – –

BMS rel

Branch if Interrupt Mask Set (if I = 1)

REL

2D rr

ppp

– – – – – –

BNE rel

Branch if Not Equal (if Z = 0)

REL

26 rr

ppp

– – – – – –

BPL rel

Branch if Plus (if N = 0)

REL

2A rr

ppp

– – – – – –

Table 7-2. Instruction Set Summary (Sheet 2 of 9)

Source

Form

Operation

Object Code

Cyc-by-Cyc

Details

Affect

on CCR

VH I N Z C

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