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L99DZ70XP Datasheet(PDF) 19 Page - STMicroelectronics |
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L99DZ70XP Datasheet(HTML) 19 Page - STMicroelectronics |
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19 / 47 page ![]() L99DZ70XP Electrical specifications Doc ID 15162 Rev 3 19/47 Table 14. Delay time from standby to active mode Item Symbol Parameter Test condition Min. Typ. Max. Unit 14.1 tset Delay time Switching from standby to active mode. Time until output drivers are enabled after CSN going to high and set bit 0=1 of control register 0. 256 300 µs Table 15. Inputs: CSN, CLK, PWM1/2 and DI Item Symbol Parameter Test condition Min. Typ. Max. Unit 15.1 VinL Input low level VCC = 5V 0.3* Vcc V 15.2 VinH Input high level VCC = 5V 0.7* Vcc V 15.3 Vin Hyst Input hysteresis VCC = 5V 500 mV 15.4 RCSN in CSN pull up resistor VCC = 5V 0V<VCSN<0.7VCC 30 120 250 k Ω 15.5 RCLK in CLK pull down resistor VCC = 5V VCLK = 1.5V 30 60 150 k Ω 15.6 RDI in DI pull down resistor VCC = 5V VDI = 1.5V 30 60 150 k Ω 15.7 RPWM1 in PWM1 pull down resistor VCC = 5V VPWM1= 1.5V 30 60 150 k Ω 15.8 Cin (1) 1. Value of input capacity is not measured in production test. Parameter guaranteed by design. Input capacitance at input CSN, CLK, DI and PWM1/2 0 V < VCC < 5.3V 10 pF Table 16. SDI timing (1) Item Symbol Parameter Test condition Min. Typ. Max. Unit 16.1 tCLK Clock period VCC = 5V 1000 ns 16.2 tCLKH Clock high time VCC = 5V 115 ns 16.3 tCLKL Clock low time VCC = 5V 115 ns 16.4 tset CSN CSN setup time, CSN low before rising edge of CLK VCC = 5V 400 ns 16.5 tset CLK CLK setup time, CLK high before rising edge of CSN VCC = 5V 400 ns 16.6 tset DI DI setup time VCC = 5V 200 ns 16.7 thold DI DI hold time VCC = 5V 200 ns |
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