L99DZ70XP datasheet(28/47 Pages) STMICROELECTRONICS

28 / 47 page

Application information

L99DZ70XP

28/47

Doc ID 15162 Rev 3

3.15

Controller for electrochromic glass

The voltage of an electrochromic element connected at pin ECV can be controlled to a

target value, which is set by the bits 7 down to 2 of control register 1. Setting bit 1 of control

source follower, with its gate connected to pin ECDR and which drives the electrochrome

mirror voltage at pin ECV, form the control loop. The drain of the external MOS transistor is

supplied by OUT10. A diode from pin ECV (anode) to pin ECDR (cathode) has been placed

on the chip to protect the external MOS source follower. A capacitor of at least 5 nF has to

be added to pin ECDR for loop-stability.

The target voltage is binary coded with a full scale range of 1.5V. If Bit 0 of control register 2

is set to '1', the maximum controller output voltage is clamped to 1.2V without changing the

resolution of bits 7-2 of control register 1. When setting the target voltage to 0V and

programming the ECVLS driver to on-state, the voltage at pin ECV is pulled to ground by a

1.6 Ohm low-side switch (fast discharge).

The status of the voltage control loop is reported via SPI. Bit 0 in the status register 2 is set,

if the voltage at pin ECV is higher, whereas Bit 1 in the same status register is set, if the

voltage at pin ECV is lower than the target value. Both status bits are valid, if they are stable

for at least 150 µs.

Since OUT10 is the output of a high-side driver, it contains the same diagnose functions as

the other high-side drivers (e.g. During an over current detection, the control loop is

switched off). In electrochrome mode OUT10 cannot be controlled by PWM mode. For EMS

reasons the loop capacitor at pin ECDR as well as the capacitor between ECV and GND

have to be placed to the respective pins as close as possible.

L99DZ70XP Datasheet(PDF) 28 Page - STMicroelectronics