L99DZ70XP datasheet(40/47 Pages) STMICROELECTRONICS

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SPI - control and status registers

L99DZ70XP

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Doc ID 15162 Rev 3

5.7

Status register 2

Table 31.

Status register 2 (read)

Bit

Name

Comment

OUT7 – OC

In case of an over-current event the corresponding status bit OC is set and

the output driver is disabled. If the over-current recovery enable bit is set

the output will be automatically reactivated after a delay time resulting in a

PWM modulated current with a programmable duty cycle.

If the over-current recovery bit is not set the micro controller has to clear the

over-current bit to reactivate the output driver.

The open load detection monitors the load current in each activated output

stage. If the load current is below the under-current detection threshold for

at least 1 ms (tdOL) the corresponding under-current bit UC is set. Due to

mechanical/electrical inertia of typical loads a short activation of the outputs

(e.g. 3ms) can be used to test the open load status without changing the

mechanical/electrical state of the loads.

OUT7 – UC

OUT8 – OC

OUT8 – UC

OUT9 – OC

OUT9 – UC

OUT10 – OC

8OUT10 – UC

OUT11 – OC

6OUT11 – UC

5ECV – OC

ECV – UC

under-voltage

In case of an over-voltage or under-voltage event the corresponding bit is

set and the outputs are deactivated. If VS voltage recovers to normal

operating conditions outputs are reactivated automatically (if bit 4 of control

over-voltage

ECV voltage not

reached

Two comparators monitor the voltage at pin ECV in electrocrome mode. If

this voltage is below / above the programmed target these bits signal the

difference after at least 32 µs. The bits are not latched and may toggle after

at least 32 µs, if the ECV voltage has not yet reached the target. They are

not assigned to the Global Error Flag.

ECV voltage

too high

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