L99DZ70XP datasheet(34/47 Pages) STMICROELECTRONICS

34 / 47 page

SPI - control and status registers

L99DZ70XP

34/47

Doc ID 15162 Rev 3

SPI - control and status registers

5.1

Control register 0

Table 25.

Control register 0 (read/write)

Bit

Name

Comment

OUT1 – HS

on/off

If a bit is set the selected output driver is switched on. If the corresponding

PWM enable bit is set the driver is only activated if PWM1 (PWM2) input

signal is high. The outputs of OUT1-OUT6 are half bridges. If the bits of

HS- and LS-driver of the same half bridge are set, the internal logic

prevents that both drivers of this output stage can be switched on

simultaneously in order to avoid a high internal current from Vs to GND.

OUT1 – LS

on/off

OUT2 – HS

on/off

OUT2 – LS

on/off

OUT3 – HS

on/off

OUT3 – LS

on/off

OUT4 – HS

on/off

OUT4 – LS

on/off

OUT5 – HS

on/off

OUT5 – LS

on/off

OUT6 – HS

on/off

OUT6 – LS

on/off

Reserved (has to be set to '0')

Enable bit

If enable bit is set the device will be switched in active mode. If enable bit is

cleared, the device enters standby mode and all bits are cleared.

L99DZ70XP Datasheet(PDF) 34 Page - STMicroelectronics

L99DZ70XP Datasheet(HTML) 34 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47

Datasheet Download

Link URL