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W25Q32FVZPIP Datasheet(PDF) 65 Page - Winbond

Part # W25Q32FVZPIP
Description  3V 32M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI
PDF  99 Pages
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Manufacturer  WINBOND [Winbond]
Direct Link  http://www.winbond.com
Logo WINBOND - Winbond

W25Q32FVZPIP Datasheet(HTML) 65 Page - Winbond

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W25Q32FV
Publication Release Date: Sept 16,, 2013
- 64 -
Revision H
8.2.27
Read Manufacturer / Device ID Quad I/O (94h)
The Read Manufacturer / Device ID Quad I/O instruction is an alternative to the Read Manufacturer /
Device ID instruction that provides both the JEDEC assigned manufacturer ID and the specific device ID
at 4x speed.
The Read Manufacturer / Device ID Quad I/O instruction is similar to the Fast Read Quad I/O instruction.
The instruction is initiated by driving the /CS pin low and shifting the instruction code “94h” followed by a
four clock dummy cycles and then a 24-bit address (A23-A0) of 000000h, but with the capability to input
the Address bits four bits per clock. After which, the Manufacturer ID for Winbond (EFh) and the Device
ID are shifted out four bits per clock on the falling edge of CLK with most significant bit (MSB) first as
shown in Figure 41. The Device ID values for the W25Q32FV are listed in Manufacturer and Device
Identification table. The Manufacturer and Device IDs can be read continuously, alternating from one to
the other. The instruction is completed by driving /CS high.
Mode 0
Mode 3
0
1
2
3
4
5
6
7
Instruction (94h)
High Impedance
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
5
1
4
0
23
Mode 0
Mode 3
IOs switch from
Input to Output
High Impedance
7
3
6
2
/CS
CLK
IO
0
IO
1
IO
2
IO
3
High Impedance
A23-16
A15-8
A7-0
(00h)
M7-0
MFR ID
Device ID
Dummy
Dummy
/CS
CLK
IO
0
IO
1
IO
2
IO
3
23
0
1
2
3
5
1
4
0
7
3
6
2
5
1
4
0
7
3
6
2
5
1
4
0
7
3
6
2
5
1
4
0
7
3
6
2
5
1
4
0
7
3
6
2
5
1
4
0
7
3
6
2
5
1
4
0
7
3
6
2
5
1
4
0
7
3
6
2
5
1
4
0
7
3
6
2
24
25
26
27
28
29
30
MFR ID
(repeat)
Device ID
(repeat)
MFR ID
(repeat)
Device ID
(repeat)
Figure 41. Read Manufacturer / Device ID Quad I/O Instruction (SPI Mode only)
Note
:
The “Continuous Read Mode” bits M(7-0) must be set to Fxh to be compatible with Fast Read Quad I/O instruction.



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