ATXMEGA8E5_14 datasheet(7/147 Pages) ATMEL

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XMEGA E5 [DATASHEET]

Atmel-8153I–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–08/2014

CPU

7.1

Features

8/16-bit, high-performance Atmel AVR RISC CPU

142 instructions

Hardware multiplier

32x8-bit registers directly connected to the ALU

Stack in RAM

Stack pointer accessible in I/O memory space

Direct addressing of up to 16MB of program memory and 16MB of data memory

True 16/24-bit access to 16/24-bit I/O registers

Efficient support for 8-, 16-, and 32-bit arithmetic

Configuration change protection of system-critical features

7.2

Overview

All AVR XMEGA devices use the 8/16-bit AVR CPU. The main function of the CPU is to execute the code and perform all

calculations. The CPU is able to access memories, perform calculations, control peripherals, and execute the program in

the flash memory. Interrupt handling is described in a separate section, refer to “Interrupts and Programmable Multilevel

Interrupt Controller” on page 28.

7.3

Architectural Overview

In order to maximize performance and parallelism, the AVR CPU uses a Harvard architecture with separate memories

and buses for program and data. Instructions in the program memory are executed with single-level pipelining. While one

instruction is being executed, the next instruction is pre-fetched from the program memory. This enables instructions to

be executed on every clock cycle. For details of all AVR instructions, refer to http://www.atmel.com/avr.

ATXMEGA8E5 Datasheet(PDF) 7 Page - ATMEL Corporation