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ATXMEGA8E5 Datasheet(PDF) 91 Page - ATMEL Corporation |
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ATXMEGA8E5 Datasheet(HTML) 91 Page - ATMEL Corporation |
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91 / 147 page  91 XMEGA E5 [DATASHEET] Atmel-8153I–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–08/2014 Table 36-29. SPI timing characteristics and requirements. Symbol Parameter Condition Min. Typ. Max. Units tSCK SCK period Master ns tSCKW SCK high/low width Master 0.5×SCK tSCKR SCK rise time Master 2.7 tSCKF SCK fall time Master 2.7 tMIS MISO setup to SCK Master 10 tMIH MISO hold after SCK Master 10 tMOS MOSI setup SCK Master 0.5×SCK tMOH MOSI hold after SCK Master 1.0 tSSCK Slave SCK Period Slave 4×t ClkPER tSSCKW SCK high/low width Slave 2×t ClkPER tSSCKR SCK rise time Slave 1600 tSSCKF SCK fall time Slave 1600 tSIS MOSI setup to SCK Slave 3.0 tSIH MOSI hold after SCK Slave tClkPER tSSS SS setup to SCK Slave 21 tSSH SS hold after SCK Slave 20 tSOS MISO setup SCK Slave 8.0 tSOH MISO hold after SCK Slave 13 tSOSS MISO setup after SS low Slave 11 tSOSH MISO hold after SS high Slave 8.0 |
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