ATXMEGA8E5_14 datasheet(26/147 Pages) ATMEL

26 / 147 page

XMEGA E5 [DATASHEET]

Atmel-8153I–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–08/2014

13.4.2 Brownout Detection

The on-chip brownout detection (BOD) circuit monitors the VCC level during operation by comparing it to a fixed,

programmable level that is selected by the BODLEVEL fuses. If disabled, BOD is forced on at the lowest level during chip

erase and when the PDI is enabled.

13.4.3 External Reset

The external reset circuit is connected to the external RESET pin. The external reset will trigger when the RESET pin is

driven below the RESET pin threshold voltage, VRST, for longer than the minimum pulse period, tEXT. The reset will be

held as long as the pin is kept low. The RESET pin includes an internal pull-up resistor.

13.4.4 Watchdog Reset

The watchdog timer (WDT) is a system function for monitoring correct program operation. If the WDT is not reset from

the software within a programmable timeout period, a watchdog reset will be given. The watchdog reset is active for one

to two clock cycles of the 2MHz internal oscillator. For more details see “WDT – Watchdog Timer” on page 27.

13.4.5 Software Reset

The software reset makes it possible to issue a system reset from software by writing to the software reset bit in the reset

control register. The reset will be issued within two CPU clock cycles after writing the bit. It is not possible to execute any

instruction from when a software reset is requested until it is issued.

13.4.6 Program and Debug Interface Reset

The program and debug interface reset contains a separate reset source that is used to reset the device during external

programming and debugging. This reset source is accessible only from external debuggers and programmers.

ATXMEGA8E5 Datasheet(PDF) 26 Page - ATMEL Corporation