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UPSD3312D Datasheet(PDF) 175 Page - STMicroelectronics |
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UPSD3312D Datasheet(HTML) 175 Page - STMicroelectronics |
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175 / 272 page  Obsolete Product(s) - Obsolete Product(s) Obsolete Product(s) - Obsolete Product(s) UPSD33xx PSD module Doc ID 9685 Rev 7 175/272 Figure 55. Mapping: all Flash in code space ● Figure 56 on page 175 Place the larger main Flash memory into XDATA space and the smaller secondary Flash into program space for systems that need a large amount of Flash for data recording or large look-up tables, and not so much Flash for 8032 firmware. Figure 56. Mapping: small code / big data It is also possible to “reclassify” the Flash memories during runtime, moving the memories between XDATA memory space and program memory space on-the-fly. This essentially means that the user can override the initial setting during run-time by writing to a csiop register (the VM register). This is useful for IAP, because standard 8051 architecture does not allow writing to program space. For example, if the user wants to update firmware in main Flash memory that is residing in program space, the user can temporarily “reclassify” the main Flash memory into XDATA space to erase and rewrite it while executing IAP code 0000h 8000h 4000h 6000h FFFFh 8032 XDATA SPACE (RD and WR) 8032 PROGRAM SPACE (PSEN) csboot1, 8KB Common Memory to All Pages csboot0, 8KB Common Memory to All Pages csboot2, 8KB Common Memory to All Pages csboot3, 8KB Common Memory to All Pages Page X rs0, 8KB csiop, 256B fs7 16KB fs3 16KB fs1 16KB Page 0 Page 1 Page 2 Page 3 2000h 0000h FFFFh fs6 16KB fs5 16KB fs4 16KB fs2 16KB fs0 16KB System I/O C000h 2100h 2000h AI09175 0000h 8000h 4000h 6000h FFFFh 8032 XDATA SPACE (RD and WR) 8032 PROGRAM SPACE (PSEN) csboot0 8KB csboot1 8KB csboot2 8KB csboot3 8KB Page X rs0, 8KB Common Memory to All Pages csiop, 256 bytes, Common to All Pages fs7 16KB fs3 16KB fs1 16KB Page 0 Page 1 Page 2 Page 3 2000h 0000h 8000h FFFFh Nothing Mapped fs6 16KB fs5 16KB fs4 16KB fs2 16KB fs0 16KB System I/O C000h 2100h 2000h AI09176 |
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