DRV10983ZPWPR datasheet(27/58 Pages) TI1

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Speed

Command

PWM duty

Maximum

Speed

Command

100%

Speed

Command

Analog Input

Maximum

Speed

Command

ANA-ZS

ANA-FS

DRV10983

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SLVSCP6C – JULY 2014 – REVISED MAY 2016

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Figure 21. Analog Mode Speed Command

9.4.5.3 Digital PWM Input Mode Speed Control

If SpdCtrlMd = 1, the SPEED input pin is configured to operate as a PWM-encoded digital input. The PWM duty

cycle applied to the SPEED pin can be varied from 0 to 100%. The speed command is proportional to the PWM

input duty cycle. The speed command will be stopping the motor when the PWM input keeps at 0 for tEN_SL_SB

(see Figure 22).

The frequency of the PWM input signal applied to the SPEED pin is defined as ƒPWM. This is the frequency the

device can accept to control motor speed. It does not correspond to the PWM output frequency that is applied to

the motor phase. The PWM output frequency can be configured to be either 25 kHz when the DoubleFreq bit is

set to 0 or to 50 kHz when DoubleFreq bit is set to 1.

Figure 22. PWM Mode Speed Command

9.4.5.4 I2C Mode Speed Control

The DRV10983 can also command the speed through the I2C serial interface. To enable this feature, the

OverRide bit is set to 1. When the DRV10983 is configured to operate in I2C mode, it ignores the signal applied

to the SPEED pin.

The speed command can be set by writing the SpdCtrl[8] and SpdCtrl[7:0] bits. The 9-bit SpdCtrl [8:0] located in

the SpeedCtrl1 and SpeedCntrl2 registers are used to set the peak amplitude voltage applied to the motor. The

maximum speed command is set when SpdCtrl [8:0] is set to 0x1FF (511).

When SpdCtrl [8] is written to the SpeedCtrl2 register, the data is stored, but the output is not changed. When

SpdCtrl [7:0] is written to the SpeedCtrl1 register, the speed command is updated (see Figure 23).

DRV10983ZPWPR Datasheet(PDF) 27 Page - Texas Instruments