DRV10983ZPWPR datasheet(31/58 Pages) TI1

31 / 58 page

DAC

Digital Core

–

Lock detection current limit

Speed abnormal

Open loop stuck

Closed loop stuck

No motor fault

LockEn (0, 1, 2, 3, 4, 5)

Tri-state

and restart

logic

FaultCode [5:0]

Status[4]

Set

Reset

BEMF abnormal

DRV10983

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SLVSCP6C – JULY 2014 – REVISED MAY 2016

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When a lock condition is detected, the MtrLck in the Status register is set. The FaultCode register provides an

indication of which of the six different conditions was detected on Lock5 to Lock0. These bits are reset when the

motor restarts. The bits in the FaultCode register are set even if the lock detect scheme is disabled.

The DRV10983 reacts to either locked rotor or no motor connected conditions by putting the output drivers into a

high-impedance state. To prevent the energy in the motor from pumping the supply voltage, the DRV10983

incorporates an anti-voltage-surge (AVS) process whenever the output stages transition into the high-impedance

state. The AVS function is described in AVS Function . After entering the high-impedance state as a result of a

fault condition, the system tries to restart after tLOCK_OFF.

Figure 27. Lock Detect and Fault Diagnose

9.4.7.1 Lock0: Lock Detection Current Limit Triggered

The lock detection current limit function provides a configurable threshold for limiting the current to prevent

damage to the system. This is often tripped in the event of a sudden locked rotor condition. The DRV10983

continuously monitors the current in the low-side drivers as shown in Figure 28. If the current goes higher than

the threshold configured by the HWiLimitThr[2:0] bits, then the DRV10983 stops driving the motor by placing the

output phases into a high-impedance state. The MtrLck bit is set and a lock condition is reported. It retries after

tLOCK_OFF.

Set the lock detection current limit to a higher value than the acceleration current limit.

Figure 28. Lock Detection Current Limit

DRV10983ZPWPR Datasheet(PDF) 31 Page - Texas Instruments