LM97600CIUTSLASHNOPB datasheet(46/58 Pages) TI1

46 / 58 page

LM97600

SNAS600A – JULY 2012 – REVISED MARCH 2013

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Table 13. Configuration Register 2

Addr: 02h (0 0010b)

POR state: 0530h

Bit

D15

D14

D13

D12

D11

D10

Name

CAL

STV

Res

POR

Bit 15

Initiate CALibration

When this bit is set to 1b, an on-command calibration is initiated. This bit is not reset automatically upon

completion of the calibration. Therefore, the user must reset this bit to 0b and then set it to 1b again to

execute another calibration. This bit is logically OR'd with the CAL pin, both bit and pin must be set to 0

before either is used to initiate another calibration

Bit 14

Select Termination Value

When this bit is set to 0b (default) the analog and clock input terminations are set to 100 ohms. When

this bit is set to 1b, the analog and clock input terminations are set to 150 ohms. In either case, the

external Rtrim resistor value must be 3.6k ohms ±0.1%.

Bits 13:0

Reserved

Must be set to 00 0101 0011 0000b.

Table 14. Calibration Configuration

Addr: 03h (0 0011b)

POR state: F580h

Bit

D15

D14

D13

D12

D11

D10

Name

Res

RTE

Res

SSC

Res

POR

Bits 15:13

Reserved

Must be set to 111b.

Bit 12

Resistor Trim Enable

When set to 1b, the input termination resistor values are calibrated normally. When set to 0b, the input

termination resistor values are not calibrated.

Bits 11:6

Reserved

Must be set to 00 0000b.

Bit 5

SPI Scan Control

When set to 1b this bit enables the readout and writeback of the SPI calibration coefficient vector,

accessed via Register 0Eh.

Bits 4:0

Reserved

Must be set to 0 0000b.

Table 15. Channel A Full Scale Range Setting(1)

Addr: 04h (0 0100b)

POR state: 8000h

Bit

D15

D14

D13

D12

D11

D10

Name

Res

POR

(1)

Note: The Full Scale Range registers for each of the four ADCs must be written consistent with the ADC Mode and Input Select settings

Bits 15:7

Full Scale Range Magnitude Setting

These 9 bits set the addressed ADC channel full scale range as follows:

0d = 560 mV pk-pk

255d = 700 mV pk-pk (default)

511d = 840 mV pk-pk

Bits 6:0

Reserved

Must be set to 000 0000b.

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