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LM97600CIUT/NOPB Datasheet(PDF) 9 Page - Texas Instruments

Part # LM97600CIUT/NOPB
Description  High Performance, Low Power A/D
PDF  58 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

LM97600CIUT/NOPB Datasheet(HTML) 9 Page - Texas Instruments

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I / O
GND
V
A
TO INTERNAL
CIRCUITRY
LM97600
www.ti.com
SNAS600A – JULY 2012 – REVISED MARCH 2013
Package Thermal Resistance
Package
θJA
θJC1 (Top of Package)
θJC2 (Center Balls)
292–Ball BGA Thermally
15.9°C / W
5.6°C / W
5.1°C / W
Enhanced Package
Converter Electrical Characteristics
The following specifications apply after calibration for VA = VTH = VC = +1.2VDC, VO = V25 = +2.5VDC, VIN FSR (a.c. coupled) =
Default ECM setting, CL = 10 pF, Differential a.c. coupled Sinewave Input Clock, fCLK = 2.5 GHz at 0.5VP-P with 50% duty
cycle, REXT = 3600Ω ±0.1%, RTRIM = 3600Ω ±0.1%, Analog Signal Source Impedance = 100Ω Differential, after calibration.
Boldface limits apply for TA = TMIN to TMAX. All other limits TA = 25°C, unless otherwise noted.
(1) (2)
Typical
Limits
Units
Symbol
Parameter
Conditions
(3)
(3)
(Limits)
STATIC CONVERTER CHARACTERISTICS
DC Coupled, 1MHz Sine Wave
INL
Integral Non-Linearity (Best fit)
±0.6
±1
lsb (max)
Over Ranged, Single ADC Mode
DC Coupled, 1MHz Sine Wave
+0.65/
DNL
Differential Non-Linearity
+1/
−0.70
lsb (max)
Over Ranged, Single ADC Mode
−0.50
See the Selective Truncation
Resolution with No Missing Codes
7.6
Bits
section
VOFF
Offset Error
−1
lsb
VOFF_ADJ Input Offset Adjustment Range
Extended Control Mode
±28
mV
mV
PFSE
Positive Full-Scale Error(4)
−5
±30
(max)
mV
NFSE
Negative Full-Scale Error(4)
−2
±30
(max)
%FS
FS_ADJ
Full-Scale Adjustment Range
Extended Control Mode
±20
±15
(min)
DYNAMIC CONVERTER CHARACTERISTICS
FPBW
Full Power Bandwidth
1.3
GHz
DC to
Gain Flatness
0.0 to -1.0 dBFS
MHz
400
Errors/
Code Error Rate
10−18
Sample
(1)
The analog inputs are protected as shown below. Input voltage magnitudes beyond the Absolute Maximum Ratings may damage this
device.
(2)
To ensure accuracy, it is required that VA, VTH, VC, V25, and VO be well bypassed. Each supply pin must be decoupled with separate
bypass capacitors.
(3)
Typical figures are at TA = 25°C, and represent most likely parametric norms. Test limits are ensured to AOQL (Average Outgoing
Quality Level).
(4)
Calculation of Full-Scale Error for this device assumes that the actual reference voltage is exactly its nominal value. Full-Scale Error for
this device, therefore, is a combination of Full-Scale Error and Reference Voltage Error. See Figure 2. For relationship between Gain
Error and Full-Scale Error, see Specification Definitions.
Copyright © 2012–2013, Texas Instruments Incorporated
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Product Folder Links: LM97600



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