ADT7476AARQZ-R datasheet(64/69 Pages) ONSEMI

64 / 69 page

ADT7476A

www.onsemi.com

Table 79. REGISTER 0x75 − INTERRUPT MASK REGISTER 2 (POWER-ON DEFAULT [7:0] = 0x00)

Bit No.

Mnemonic

R/W

Description

[0]

12 V/VC

R/W

When Pin 21 is configured as a 12 V input, 12 V/VC = 1 masks SMBALERT for out-of-limit

conditions on the 12 V channel. When Pin 21 is programmed as VID5, this bit masks an

SMBALERT, if the VID5 VID code bit changes.

[1]

OVT

R/W

OVT = 1 masks SMBALERT for overtemperature THERM conditions.

[2]

FAN1

R/W

FAN1 = 1 masks SMBALERT for a Fan 1 fault.

[3]

FAN2

R/W

FAN2 = 1 masks SMBALERT for a Fan 2 fault.

[4]

FAN3

R/W

FAN3 = 1 masks SMBALERT for a Fan 3 fault.

[5]

F4P

R/W

If Pin 14 is configured as TACH4, F4P = 1 masks SMBALERT for a Fan 4 fault. If Pin 14 is

configured as THERM, F4P = 1 masks SMBALERT for an exceeded THERM timer limit. If

Pin 14 is configured as GPIO, F4P = 1 masks SMBALERT when GPIO is an input and GPIO

is asserted.

[6]

R/W

D1 = 1 masks SMBALERT for a diode open or short on a Remote 1 channel.

[7]

R/W

D2 = 1 masks SMBALERT for a diode open or short on a Remote 2 channel.

Table 80. REGISTER 0x76 − EXTENDED RESOLUTION REGISTER 1 (POWER-ON DEFAULT [7:0] = 0x00) (Note 1)

Bit No.

Mnemonic

R/W

Description

[1:0]

2.5 V

Read-only

2.5 V LSBs. Holds the 2 LSBs of the 10-bit 2.5 V measurement.

[3:2]

VCCP

Read-only

VCCP LSBs. Holds the 2 LSBs of the 10-bit VCCP measurement.

[5:4]

VCC

Read-only

VCC LSBs. Holds the 2 LSBs of the 10-bit VCC measurement.

[7:6]

5.0 V

Read-only

5.0 V LSBs. Holds the 2 LSBs of the 10-bit 5.0 V measurement.

1. If this register is read, this register and the registers holding the MSB of each reading are frozen until read.

Table 81. REGISTER 0x77 − EXTENDED RESOLUTION REGISTER 2 (POWER-ON DEFAULT [7:0] = 0x00) (Note 1)

Bit No.

Mnemonic

R/W

Description

[1:0]

12 V

Read-only

12 V LSBs. Holds the 2 LSBs of the 10-bit 12 V measurement.

[3:2]

TDM1

Read-only

Remote 1 temperature LSBs. Holds the 2 LSBs of the 10-bit Remote 1 temperature

measurement.

[5:4]

LTMP

Read-only

Local temperature LSBs. Holds the 2 LSBs of the 10-bit local temperature measurement.

[7:6]

TDM2

Read-only

Remote 2 temperature LSBs. Holds the 2 LSBs of the 10-bit Remote 2 temperature

measurement.

1. If this register is read, this register and the registers holding the MSB of each reading are frozen until read.

ADT7476AARQZ-R Datasheet(PDF) 64 Page - ON Semiconductor

ADT7476AARQZ-R Datasheet(HTML) 64 Page - ON Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69

Datasheet Download

Link URL