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SPC564A80L7 Datasheet(PDF) 12 Page - STMicroelectronics |
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SPC564A80L7 Datasheet(HTML) 12 Page - STMicroelectronics |
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12 / 157 page  Introduction SPC564A74L7, SPC564A80B4, SPC564A80L7 12/157 Doc ID 15399 Rev 9 ● Development Trigger Semaphore (DTS) – Register of semaphores (32-bits) and an identification register – Used as part of a triggered data acquisition protocol – EVTO pin is used to communicate to the external tool ● Clock generation – On-chip 4–40 MHz main oscillator – On-chip FMPLL (frequency-modulated phase-locked loop) ● Up to 120 general purpose I/O lines – Individually programmable as input, output or special function – Programmable threshold (hysteresis) ● Power reduction mode: slow, stop and stand-by modes ● Flexible supply scheme – 5 V single supply with external ballast – Multiple external supply: 5 V, 3.3 V and 1.2 V ● Packages –LQFP176 – LBGA208 – PBGA324 – Known Good Die (KGD) – 496-pin CSP (calibration tool only) |
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