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HT56RB688 Datasheet(PDF) 60 Page - Holtek Semiconductor Inc |
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HT56RB688 Datasheet(HTML) 60 Page - Holtek Semiconductor Inc |
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60 / 164 page ![]() 8+4 PWM Mode Modulation Each full PWM cycle, as it is 12-bits wide, has 4096 clock periods. However, in the 8+4 PWM mode, each PWM cycle is subdivided into sixteen individual sub-cycles known as modulation cycle 0 ~ modulation cycle 15, denoted as ²i² in the table. Each one of these sixteen sub-cycles contains 256 clock cycles. In this mode, a modulation frequency increase of sixteen is achieved. The 12-bit PWM register value, which represents the overall duty cycle of the PWM waveform, is divided into two groups. The first group which consists of bit4~bit11 is denoted here as the DC value. The second group which consists of bit0~bit3 is known as the AC value. In the 8+4 PWM mode, the duty cycle value of each of the two modulation sub-cycles is shown in the following table. Parameter AC (0~15) DC (Duty Cycle) Modulation cycle i (i=0~15) i <AC DC+1 256 i ³AC DC 256 8+4 Mode Modulation Cycle Values The accompanying diagram illustrates the waveforms associated with the 8+4 mode of PWM opera- tion. It is important to note how the single PWM cycle is subdivided into 16 individual modulation cycles, numbered 0~15 and how the AC value is related to the PWM value. PWM Output Control The four PWM0~PWM3 outputs are shared with I/O pins. To operate as a PWM output and not as an I/O pin, the relevant PWM enable control bit in PWMnL register must be set high where n denotes 0 from 3. A zero must also be written to the corresponding bit in the relevant port control register, to ensure that the PWM output pin is setup as an output. After these two initial steps have been carried out, and of course after the required PWM 12-bit value has been written into the PWM register pair register, writing a ²1² to the corresponding port data register will enable the PWM data to appear on the pin. Writing a ²0² to the bit will disable the PWM output function and force the output low. In this way, the Port data register bits, can also be used as an on/off control for the PWM function. Note that if the enable bit in the PWMnL register is set high to enable the PWM function, but a ²1² has been written to its corresponding bit in the port control register to configure the pin as an input, then the pin can still function as a normal input line, with pull-high resistor selections. Rev. 1.10 60 April 15, 2013 HT56RB688 TinyPowerTM A/D type Smart Card OTP MCU with LCD, DAC, ISO 7816 and USB Interfaces f S Y S / 2 P W M [ P W M ] = 1 6 0 0 [ P W M ] = 1 6 0 1 P W M [ P W M ] = 1 6 0 2 P W M [ P W M ] = 1 6 1 5 P W M P W M c y c l e : 4 0 9 6 / f S Y S 1 0 0 / 2 5 6 1 0 1 / 2 5 6 1 0 1 / 2 5 6 1 0 1 / 2 5 6 M o d u l a t i o n c y c l e 0 P W M m o d u l a t i o n p e r i o d : 2 5 6 / f S Y S M o d u l a t i o n c y c l e 1 M o d u l a t i o n c y c l e 2 M o d u l a t i o n c y c l e 1 5 M o d u l a t i o n c y c l e 0 1 0 0 / 2 5 6 1 0 0 / 2 5 6 1 0 0 / 2 5 6 1 0 1 / 2 5 6 1 0 0 / 2 5 6 1 0 1 / 2 5 6 1 0 1 / 2 5 6 1 0 1 / 2 5 6 1 0 0 / 2 5 6 1 0 0 / 2 5 6 1 0 0 / 2 5 6 1 0 0 / 2 5 6 1 0 0 / 2 5 6 1 0 1 / 2 5 6 1 0 1 / 2 5 6 1 0 1 / 2 5 6 8+4 PWM Mode |
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