HT56RB688_13 datasheet(75/164 Pages) HOLTEK

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SPI Registers

There are three internal registers which control the overall operation of the SPI interface for each SIM.

These are the SIMnDR data register and two control registers SIMnCTL0 and SIMnCTL2. Note that

the SIMnCTL1 register is only used by the I

2C interface.

Master/Salve

SIMnEN=0

Master - SIMnEN=1

Slave - SIMnEN=1

CSENn=1

CSENn=0

SCSn Line=0

(CSENn=1)

SCSn Line=1

(CSENn=1)

SCSn

I, Z

SDOn

OOOO

SDIn

I, Z

SCKn

H: CKPOLn=0

L: CKPOLn=1

H: CKPOLn=0

L: CKPOLn=1

I, Z

Note:

²Z² floating, ²H² output high, ²L² output low, ²I² Input, ²O²output level, ²I,Z² input floating (no pull-high)

SPI Interface Pin Status

The SIMnDR register is used to store the data being transmitted and received. The same register is

used by both the SPI and I

2C functions. Before the microcontroller writes data to the SPI bus, the actual

data to be transmitted must be placed in the SIMnDR register. After the data is received from the SPI

bus, the microcontroller can read it from the SIMnDR register. Any transmission or reception of data

from the SPI bus must be made via the SIMnDR register.

Bit

76543210

Label

SnD7

SnD6

SnD5

SnD4

SnD3

SnD2

SnD1

SnD0

R/W

POR

XXXXXXXX

There are also two control registers for the SPI interface, SIMnCTL0 and SIMnCTL2. Note that the

SIMnCTL2 register also has the name SIMnAR which is used by the I

2C function. The SIMnCTL1

2C function. Register SIMnCTL0 is used to con-

trol the enable/disable function and to set the data transmission clock frequency. Although not con-

nected with the SPI function, the SIMnCTL0 register is also used to control the Peripheral Clock

prescaler. Register SIMnCTL2 is used for other control functions such as LSB/MSB selection, write

collision flag etc.

The following gives further explanation of each SIM related register bit.

· SIMIDLE

The SIMIDLE bit is used to select if the master SPI interface continues running when the device is in

the IDLE mode. Setting the bit high allows the clock source of the master SPI interface or the

Peripheral clock PCLK, which is selected to come from the divided system clock, to keep active

when the device is in the IDLE mode. This will maintain the master SPI interface operation or the

Peripheral clock PCLK output active if the PCKEN bit is set to 1 in IDLE mode. Clearing the bit to

zero disables any master SPI interface operations or PCLK output in the IDLE mode. This SPI/I

idle mode control bit SIMIDLE is located at CLKMOD register bit4.

· SIMnEN

The bit is the overall on/off control for the SPI interface. When the SIMnEN bit is cleared to zero to

disable the SPI interface, the SDIn, SDOn, SCKn and SCSn lines will be in a floating condition and

the SPI operating current will be reduced to a minimum value. When the bit is high the SPI interface

is enabled. The SIMn configuration option must have first enabled the SIMn interface for this bit to

be effective. Note that when the SIMnEN bit changes from low to high the contents of the SPI

control registers will be in an unknown condition and should therefore be first initialised by the

application program.

HT56RB688

TinyPowerTM A/D type Smart Card OTP MCU

with LCD, DAC, ISO 7816 and USB Interfaces

Rev. 1.10

April 15, 2013

HT56RB688 Datasheet(PDF) 75 Page - Holtek Semiconductor Inc

HT56RB688 Datasheet(HTML) 75 Page - Holtek Semiconductor Inc

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