EM6812F2TP24B datasheet(38/81 Pages) EMMICRO

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10.2

Port A Interrupt requests

Each port A input is an interrupt request source active on rising or falling edge corresponding to the individual IntEdgPA bit

setting. The interrupt source can be debounced or direct, bit-wise selection with bit EnDebPA.

Figure 21 Schematic view of Debouncer and Edge selection

Table 33. Port A Registers for Debouncer and Interrupts

RegIntEdgPA

0x27

Debouncer edge selection

Bit

Name

Res

Reset by

R/W

Description

7-0

IntEdgPA[7:0]

ResMain

R/W

PA interrupt edge selection;

0=falling, 1=rising

RegEnDebPA

0x28

Debouncer selection

Bit

Name

Res

Reset by

R/W

Description

7-0

EnDebPA[7:0]

ResSysSlp

R/W

PA interrupt debouncer selection

0=direct, 1=debounced Pr1Ck[8] (256Hz).

Table 34. Port A Interrupt mapping

Interrupt source

Priority

IntCtrl connection

IRQPA[7:0]

Int1[7:0]

10.2.1 Debouncer

If the debouncer is selected the corresponding input signal must remain stable during 1 full debouncer clock cycle to pass

and eventually create an interrupt request.

It is recommended to use the debouncer functionality on the port A interrupt inputs. The debouncer frequency CkDebPA is

coming from the prescaler1, Pr1Ck[8] (256Hz).

Minimum input pulse length to pass the debouncer:

•

Pulse length smaller 1 debouncer clock period :

Pulse does not pass (filtered out)

•

Pulse length in-between 1 and 2 debouncer clock periods :

Pulse may pass

•

Pulse length grater than 2 debouncer clock periods:

Pulse always passes

Note:

The debouncer output is reset low with signal ResSys. On the second debouncer clock edge after reset an IRQ may be

generated. Use the interrupt mask to overcome this.

Note:

Changing RegIntEdgPA may result in a transition interpreted as a valid IRQ. Avoid it by masking the IRQ while changing

the edge selection.

PAIn

CkDebPA

EnDebPA[i]

IRQPA[i]

ResSys

IntEdgPA[i]

out

Debouncer function

EM6812F2TP24B Datasheet(PDF) 38 Page - EM Microelectronic - MARIN SA

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