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EM6812F2TP24B Datasheet(PDF) 52 Page - EM Microelectronic - MARIN SA |
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EM6812F2TP24B Datasheet(HTML) 52 Page - EM Microelectronic - MARIN SA |
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52 / 81 page ![]() R EM6812 Copyright © 2005, EM Microelectronic-Marin SA 52 www.emmicroelectronic.com 13.2 Functionality 13.2.1 Auto-Reload mode “Auto-Reload” mode means that after having down-counted from the start value in RegTimXLoad to zero, the timer restart down-counting automatically from the start value. If the start value changes during the down counting, the timer waits until the end of the loop before loading the new start value. For Auto-Reload mode, the bit ARX in RegTimersCfg must be set. The period in Auto-Reload mode is equal to the RegTimXLoad + 1 value. Startup synchronization is based on the first negative edge of the selected clock source after the start condition was fulfilled. After the startup phase, the RegTimXLoad value is transferred into the timer and down counting starts on the next active clock edge. After every zero detection the timer value is loaded again, and if RegTimXLoad was altered, the new value will be loaded. The timer stops at the first active clock edge following the removed start condition. Also, when the AR bit is cleared during down counting, the timer will stop when reaching zero (= Zero-Stop mode). At every zero crossing an interrupt IRQTimX will be generated. Figure 28. Timing diagram in Auto-Reload mode (SWStart) Stopping the timer during down-count Will freeze the timer on the current value (positive timer input clock synchronization) Restart of the stopped timer during down-count is synchronized based on the negative edge of the selected timer input clock source. As such it acts like an initial timer start and will start by loading the TimXLoad value and start the down-count. Special cases apply if the timer is stopped for short periods below 1½ timer-input clocks. In such cases the count value may be enlarged by one unit (stop seen, but restart just afterwards) or the TimXLoad may not take place (stop not seen) For proper restart, the internal, synchronized Start signal must go low for at least 1 full clock period. Note: Above mentioned timer restart delay times can be drastically reduced when after going into the stop condition the timer frequency is temporarily set to the highest available frequency (i.e. setting Pr2CkSource, NOP, going back to original clock). ClkIn SWStart Internal(Stop) TimXLoad XX XX 03 03 02 01 00 03 02 IrqTimer 01 00 03 02 Internal(Start) synchronized CPU writes Start CPU writes Stop Timer Start |
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