EM6812F2TP24B datasheet(59/81 Pages) EMMICRO

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EM6812

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13.2.8 Interrupts

Each timer has 2 selectable interrupt sources:

•

IrqTimer1 (zero detect or compare match)

•

IrqTimer2 (zero detect or compare match)

•

IrqTimer3 (zero detect or compare match)

•

IrqTimer4 (zero detect or compare match)

Table 50. Timer interrupts selection

EnPWM

TimEq

Interrupt

Irq timer on ‘Zero detect’

No timer Irq generated

Irq timer on ‘Zero detect’

Irq timer on ‘Compare match’

All these interrupt are in priority level 2 mapped in register RegInt20[3:0]. The source is individually selectable and each

interrupt may be masked in register RegMsk20[3:0]. The TimEq selection is only valid when the corresponding EnPWMX

bit is set.

In PWM mode the interruption can be generated when the timer reaches the value 0 or when it reaches the comparison

value with TimEqX in RegTimXCfg. If needing both interrupts, the user may change the IRQ source after each event.

Another solution consists of routing a PWM from port B output onto a port A input and configure this input as IRQ input

(slave timer interrupt).

If configured as 16-bit timer, only the master timer (1 or 3) will generate interrupts.

Figure 36. Interrupts generation in PWM mode.

Table 51. Timer interrupts mapping

Interrupt source

Priority

IntCtrl connection

IrqTimer1

Int2[0]

IrqTimer2

Int2[1]

IrqTimer3

Int2[2]

IrqTimer4

Int2[3]

ClkIn

SwStart

TimXLoad

TimXComp

PWM

TimXStatus

TimEq

IrqTim

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