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SH79F6488P/080PR Datasheet(PDF) 43 Page - SINOWEALTH Electronic Ltd |
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SH79F6488P/080PR Datasheet(HTML) 43 Page - SINOWEALTH Electronic Ltd |
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43 / 152 page ![]() SH79F6488/SH79F6489 43 7.7.4 Port Share The 72 bi-directional I/O ports can also share second or third special function. But the share priority should obey the Outer Most Inner Lest rule: The out most pin function in Pin Configuration has the highest priority, and the inner most pin function has the lowest priority. This means when one pin is occupied by a higher priority function (if enabled), it cannot be used as the lower priority functional pin, even the lower priority function is also enabled. Only until the higher priority function is closed by hardware or software, can the corresponding pin be released for the lower priority function use. Also the function that need pull up resister is also controlled by the same rule. When port share function is enabled, the user can modify PxCR, PxPCR (x = 0-8), but these operations will have no effect on the port status until the second function was disabled. When port share function is enabled, any read or write operation to port will only affect the data register while the port pin keeps unchanged until all the share functions are disabled. PORT0: - RXD/INT46/T2 (P0.0): EUART data input/external inturrupt46/Timer2 external input/baud-rate clock output - TXD/INT47/T3 (P0.1): EUART data output/external inturrupt47/Timer3 external input - D+ (P0.2): USB differential data Positive input/output (for SH79F6489) - D - (P0.3): USB differential data Negative input/output (for SH79F6489) - T2EX/INT0 (P0.4): Timer2 reload/capture control / external inturrupt0 - INT1 (P0.5): external inturrupt1 - INT2 (P0.6): external inturrupt2 - INT3 (P0.7): external inturrupt3 Table 7.24 PORT0 Share Table Pin No. Priority Function Enable bit PAD LQFP64 LQFP80 24 16 18 1 TXD When Write to SBUF Register 2 T2 Set TR2 bit and C/T ---- 2 ---- bit in T2CON register (Auto Pull up) or clear C/T ---- 2 ---- bit and set T2OE bit in T2MOD register 3 INT46 Set EX46 bit in IENC register, P0.0 in input mode 4 P0.0 Above condition is not met 25 17 19 1 RXD Set REN bit in SCON Register (Auto Pull up) 2 T3 Set TR3 bit in T3CON register and T3CLKS[1:0] = 01 (Auto Pull up) 3 INT47 Set EX47 bit in IENC register, P0.1 in input mode 4 P0.1 Above condition is not met 26 18 20 1 D+ Set ENUSB bit in USBCON register (for SH79F6489) 2 P0.2 Above condition is not met 27 19 21 1 D- Set ENUSB bit in USBCON register (for SH79F6489) 2 P0.3 Above condition is not met 28 20 22 1 T2EX In mode0, 2, 3, set EXEN2 bit in T2CON register, or in mode 1 set DCEN bit in T2CON register or in mode1, clear DCEN bit and set EXEN2 bit (Auto Pull up) 2 INT0 Set EX0 bit in IEN0 Register and Port0.4 is in input mode 3 P0.4 Above condition is not met 29 - 23 1 INT1 Set EX1 bit in IEN0 Register and Port0.5 is in input mode 2 P0.5 Above condition is not met 30 - 24 1 INT2 Set EX2 bit in IEN1 Register and Port0.6 is in input mode 2 P0.6 Above condition is not met 31 - 25 1 INT3 Set EX3 bit in IEN1 Register and Port0.7 is in input mode 2 P0.7 Above condition is not met |
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