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SH79F6488P/080PR Datasheet(PDF) 62 Page - SINOWEALTH Electronic Ltd |
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SH79F6488P/080PR Datasheet(HTML) 62 Page - SINOWEALTH Electronic Ltd |
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62 / 152 page ![]() SH79F6488/SH79F6489 62 7.9 Base Timer 7.9.1 Features Clock source is oscillator (32.768kHz) clock Can generate 0.5s, 1s, 1s or 1min interrupt depending on the setting of the register SH79F6488/SH79F6489 provided an internal base timer which clock source is oscillator clock. It will work when both BTEN bit being set and oscillator not stopping. And it can generate a BT interrupt every overflow if the EBT bit in the IEN1 register is set. The overflow time is precise 0.5s, 1s, 6s or 1min depending on the setting of the BTS [1:0] bits in BTCON register. Note: (1) When code option is 1010 or 1101, timer source is 32.768kHz oscillator, the base timer can generate an exact 0.5s, 1s, 1min or 1hour interrupt. (2) When code option is 0000, timer source is internal 12MHz RC, the base timer can generate an approximate 0.5s, 1s, 1min or 1hour interrupt. 7.9.2 Registers Table 7.40 Base Timer Control Register C1H Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 BTCON BTEN BTIF BTS1 BTS0 - - - - R/W R/W R/W R/W R/W - - - - Reset Value (POR/WDT/LVR/PIN) 0 0 0 0 - - - - Bit Number Bit Mnemonic Description 7 BTEN Base Timer Control Bit 0: Disable Base Timer 1: Enable Base Timer, the counter begins from ‘0’ after setting BTEN bit 6 BTIF Base Timer overflow flag bit 0: no overflow happened 1: overflow happened 5, 4 BTS[1:0] Base Timer period select 00: Base Timer overflow every 0.5s 01: Base Timer overflow every 1s 10: Base Timer overflow every 1 min 11: Base Timer overflow every 60mins Table 7.41 Second and Half-second Register C2H Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 SEC HSEC SEC6 SEC5 SEC4 SEC3 SEC2 SEC1 SEC0 R/W R/W R/W R/W R/W R/W R/W R/W R/W Reset Value (POR/WDT/LVR/PIN) 0 0 0 0 0 0 0 0 Bit Number Bit Mnemonic Description 7 HSEC This bit is a half second flag and it will overturn between 0 and 1 every half second. 6-0 SEC[6:0] This register (bit0-bit6) contains the current value (BCD) of the second counter. This register (bit0-bit6) can be read at any time without affecting the counter count. Writing to this register (bit0-bit6) loads the value to the second counter and the counter continues to count from this new value. The second counter rolls over to 0 after reaching 59. Writing a value other than 0 to 59 to this register has no effect. Be sure not to write a data such as ‘0x, 1x, 2x, 3x, 4x (x = A-F)’ to this register. |
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