SH79F6488PSLASH080PR datasheet(72/152 Pages) SINOWEALTH

72 / 152 page

SH79F6488/SH79F6489

8.2 LCD Driver

SH79F6488/SH79F6489 has two LCD drive mode: Normal Resistor LCD Driver with Fast charge and low power

LCD driver can work in IDLE and Power-down mode.

8.2.1 Normal Resistor LCD Driver with Fast charge

The LCD driver contains a controller, a duty cycle generator with 4/5/6 Common signal pins and 34/35/36 Segment driver pins.

Segment 1-36 and COM1-COM4 can also be used as I/O port, it is controlled by the P5SS、P6SS、P7SS、P8SS、PXSS register.

The 36 bytes display data RAM is addressed to 900H-923H, which could be used as data memory if needed.

The MCU consists normal display topologies with contrast adjustment which supports both 1/4duty-1/3bias and 1/5duty-1/3

bias and 1/6duty-1/3 bias driving mode. Fast Charge mode can effectively reduce the power consumption.

In addition, the LCD also provide another kind of work mode:Low power consumptionLCD (SLP), supports both 1/2/3/4COM

duty.

VLCD equals to VDD.

When MCU enters the Power-Down mode, the SLP LCD will be tsuggested.

During the Power on Reset or Pin Reset or LVR Reset or Watch-dog Reset, the LCD will be turned off, and Common and

Segment will output low.

The features of the LCD Normal Display Mode include the following:

- 1/4duty -1/3 bias or 1/5 duty - 1/3 bias by configuring the DUTY bit in LCDCON register.

- LCD frame = 64Hz.

- 4 levels contrast adjustment by configuring the CONTR[1:0] bits in LCDCON1 register.

LCD bias resistor (RLCD) can be selected as 20K/150K

Ω.The relatively high current drain through the 20k resistor will get better

LCD display effect, but it may not be suitable for some low current consume application. Lowering this current is possible by

configucring the MOD[1:0] for switching the RLCD value to 150K.

Therefore, SH79F6488/SH79F6489 provides both the low power consumption and display effect of the display mode:fast

charge mode.

When refresh the display data 20k bias resistors are selected to provide larger current.When keep the display data 150K bias

resistors are selected to save drive current. Charging time is selected as 1/4、1/8、1/16 or 1/32 of LCD com period by

FCCTL[1:0] in DISPCLK1 register.

The definition of the LCD clock is as following:

(1) when code option OP_OSC = 0000, LCDCLK is about 32kHz from internal 12MHz RC prescaler. (Refer to code option

section for details)

(2) when code option OP_OSC = 1010, LCDCLK is 32.768kHz crystal oscillator. (Refer to code option section for details)

SH79F6488P/080PR Datasheet(PDF) 72 Page - SINOWEALTH Electronic Ltd