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HC705P6AGRS/D Datasheet(PDF) 50 Page - NXP Semiconductors |
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HC705P6AGRS/D Datasheet(HTML) 50 Page - NXP Semiconductors |
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50 / 134 page  Input/Output Ports General Release Specification MC68HC705P6A — Rev. 1.0 Input/Output Ports 6.3 Port A Port A is an 8-bit bidirectional port, which does not share any of its pins with other subsystems (see Figure 6-1). The port A data register is located at address $0000 and its data direction register (DDR) is located at address $0004. The contents of the port A data register are indeterminate at initial power up and must be initialized by user software. Reset does not affect the data registers, but does clear the DDRs, thereby setting all of the port pins to input mode. Writing a one to a DDR bit sets the corresponding port pin to output mode. Port A has mask option register enabled interrupt capability with an internal pullup device NOTE: The keyscan (pullup/interrupt) feature available on port A is NOT available in the ROM device, MC68HC05P6. Figure 6-1. Port A I/O and Interrupt Circuitry READ $0000 WRITE $0000 READ $0004 DATA REGISTER BIT I/O PIN OUTPUT INTERNAL HC05 DATA BUS RESET (RST) WRITE $0004 DATA DIRECTION REGISTER BIT TO IRQ INTERRUPT SYSTEM VDD PULLUP MASK OPTION REGISTER Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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