AVR32AP datasheet(3/181 Pages) ATMEL

3 / 181 page

32001A–AVR32–06/06

AVR32

Load and store instructions have several different formats in order to reduce code size and

speed up execution:

• Load/store to an address specified by a pointer register

• Load/store to an address specified by a pointer register with postincrement

• Load/store to an address specified by a pointer register with predecrement

• Load/store to an address specified by a pointer register with displacement

• Load/store to an address specified by a small immediate (direct addressing within a small

page)

• Load/store to an address specified by a pointer register and an index register.

The register file is organized as 16 32-bit registers and includes the Program Counter, the Link

function calls and is used implicitly by some instructions.

The AVR32 architecture defines several microarchitectures in order to capture the entire range

of applications. The microarchitectures are named AVR32A, AVR32B and so on. Different

microarchitectures are suited to different end applications, allowing the designer to select a

microarchitecture with the optimum set of parameters for a specific application.

1.3

Event handling

The AVR32 incorporates a powerful event handling scheme. The different event sources, like

“Illegal opcode” and external interrupt requests, have different priority levels, ensuring a well-

defined behavior when multiple events are received simultaneously. Additionally, pending

events of a higher priority class may preempt handling of ongoing events of a lower priority

class. Each priority class has dedicated registers to keep the return address and status register

thereby removing the need to perform time-consuming memory operations to save this

information.

There are four levels of external interrupt requests, all executing in their own context. An inter-

rupt controller does the priority handling of the external interrupts and provides the prioritized

interrupt vector to the processor core.

1.4

Java Support

The AVR32 architecture defines a Java

® hardware acceleration option, in the form of a Java Vir-

tual Machine hardware implementation.

AVR32AP Datasheet(PDF) 3 Page - ATMEL Corporation