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AMD-K6-2E/233AMZ Datasheet(PDF) 140 Page - Advanced Micro Devices |
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AMD-K6-2E/233AMZ Datasheet(HTML) 140 Page - Advanced Micro Devices |
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140 / 332 page ![]() 122 Signal Descriptions Chapter 5 AMD-K6™-2E Processor Data Sheet 22529B/0—January 2000 Preliminary Information 5.44 SMIACT# (System Management Interrupt Active) Pin Attribute Output Pin Location AG-03 Summary The processor acknowledges the assertion of SMI# with the assertion of SMIACT# to indicate that the processor has entered system management mode (SMM). The system logic can use SMIACT# to enable SMM memory. See “SMI# (System Management Interrupt)” on page 121 for more details. See “System Management Mode (SMM)” on page 217 for more details regarding SMM. Driven The processor asserts SMIACT# after the last BRDY# of the last pending bus cycle is sampled asserted (including all pending write cycles) and after EWBE# is sampled asserted (if EWBE# is masked off, then SMIACT# is not affected by EWBE#). SMIACT# remains asserted until after the last BRDY# of the last pending bus cycle associated with exiting SMM is sampled asserted. SMIACT# remains asserted during any flush, internal snoop, or writeback cycle due to an inquire cycle. |
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