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AMD-K6-2E/233AMZ Datasheet(PDF) 150 Page - Advanced Micro Devices |
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AMD-K6-2E/233AMZ Datasheet(HTML) 150 Page - Advanced Micro Devices |
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150 / 332 page ![]() 132 Signal Descriptions Chapter 5 AMD-K6™-2E Processor Data Sheet 22529B/0—January 2000 Preliminary Information 5.56 Bus Cycle Definitions Table 22. Bus Cycle Definition Bus Cycle Initiated Generated by CPU Generated by System Logic M/IO# D/C# W/R# CACHE# KEN# Code Read, Instruction Cache Line Fill 1 0 0 0 0 Code Read, Noncacheable 1 0 0 1 x Code Read, Noncacheable 1 0 0 x 1 Encoding for Special Cycle 00 1 1 x Interrupt Acknowledge 0 0 0 1 x I/O Read 0 1 0 1 x I/O Write 0 1 1 1 x Memory Read, Data Cache Line Fill 1 1 0 0 0 Memory Read, Noncacheable 1 1 0 1 x Memory Read, Noncacheable 1 1 0 x 1 Memory Write, Data Cache Writeback 1 1 1 0 x Memory Write, Noncacheable 1 1 1 1 x Notes: x means “don’t care”. Table 23. Special Cycles Special Cycle Stop Grant 1 11 11 101 1 0 0 1 1 x Flush Acknowledge (FLUSH# sampled asserted) 0 1 11 01 1 1 1 0 0 1 1 x Writeback (WBINVD instruction) 0 1 11 10 1 1 1 0 0 1 1 x Halt 0 1 1 1 1 1 0 1 1 0 0 1 1 x Flush (INVD, WBINVD instruction) 0 1 11 11 1 0 1 0 0 1 1 x Shutdown 0 1 1 1 1 1 1 1 0 0 0 1 1 x Notes: x means “don’t care”. |
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