AMD-K6-2ESLASH233AMZ datasheet(264/332 Pages) AMD

264 / 332 page

246

Test and Debug

Chapter 12

AMD-K6™-2E Processor Data Sheet

22529B/0—January 2000

Preliminary Information

Interrupt 01h. The following events are considered debug traps

that ca use the proces sor to g ene rate a n I nterr upt 01 h

exception:

Enabled breakpoints for data and I/O cycles

Single-step trap

Task-switch trap

The following events are considered debug faults that cause the

processor to generate an Interrupt 01h exception:

Enabled breakpoints for instruction execution

BD bit in DR6 set to 1

Interrupt 03h. The INT 3 instructi on is defi ned i n the x86

architecture as a breakpoint instruction. This instruction

causes the processor to generate an Interrupt 03h exception.

This exception is a debug trap because the debugger is called

following the execution of the INT 3 instruction.

The INT 3 instruction is a one-byte instruction (opcode CCh)

typically used to insert a breakpoint in software by writing CCh

to the address of the first byte of the instruction to be trapped

(the target instruction). Following the trap, if the target

instruction is to be executed, the debugger must replace the

INT 3 instruction with the first byte of the target instruction.

AMD-K6-2E/233AMZ Datasheet(PDF) 264 Page - Advanced Micro Devices