MC68HC908GR4MP datasheet(201/286 Pages) FREESCALE

201 / 286 page

SIM Registers

MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7

Freescale Semiconductor

201

Figure 19-18. Stop Mode Entry Timing

Figure 19-19. Stop Mode Recovery from Interrupt or Break

19.7 SIM Registers

The SIM has three memory-mapped registers. Table 19-4 shows the mapping of these registers.

19.7.1 SIM Break Status Register

The SIM break status register (SBSR) contains a flag to indicate that a break caused an exit from wait

mode

Table 19-4. SIM Registers

Address

Access Mode

$FE00

SBSR

User

$FE01

SRSR

User

$FE03

SBFCR

User

Address:

$FE00

Bit 7

654321

Bit 0

Read:

RRRRRR

Write:

Note(1)

Reset:

00000000

R= Reserved

Note: 1. Writing a logic 0 clears SBSW.

Figure 19-20. SIM Break Status Register (SBSR)

STOP ADDR + 1

SAME

IAB

IDB

PREVIOUS DATA

NEXT OPCODE

SAME

STOP ADDR

SAME

R/W

CPUSTOP

Note : Previous data can be operand data or the STOP opcode, depending

on the last instruction.

CGMXCLK

INT/BREAK

IAB

STOP + 2

SP – 1

SP – 2

SP – 3

STOP +1

STOP RECOVERY PERIOD

MC68HC908GR4MP Datasheet(PDF) 201 Page - Freescale Semiconductor, Inc

MC68HC908GR4MP Datasheet(HTML) 201 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL