MC68HC908GR4MP datasheet(117/286 Pages) FREESCALE

117 / 286 page

MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7

Freescale Semiconductor

117

Chapter 12

External Interrupt (IRQ)

12.1 Introduction

The IRQ (external interrupt) module provides a maskable interrupt input.

12.2 Features

Features of the IRQ module include:

•

A dedicated external interrupt pin (IRQ)

•

IRQ interrupt control bits

•

Hysteresis buffer

•

Programmable edge-only or edge and level interrupt sensitivity

•

Automatic interrupt acknowledge

•

Internal pullup resistor

12.3 Functional Description

A logic 0 applied to the external interrupt pin can latch a CPU interrupt request. Figure 12-1 shows the

structure of the IRQ module.

Interrupt signals on the IRQ pin are latched into the IRQ latch. An interrupt latch remains set until one of

the following actions occurs:

•

Vector fetch — A vector fetch automatically generates an interrupt acknowledge signal that clears

the latch that caused the vector fetch.

•

Software clear — Software can clear an interrupt latch by writing to the appropriate acknowledge

bit in the interrupt status and control register (INTSCR). Writing a logic 1 to the ACK bit clears the

IRQ latch.

•

Reset — A reset automatically clears the interrupt latch.

The external interrupt pin is falling-edge-triggered out of reset and is software-configurable to be either

falling-edge or falling-edge and low-level-triggered. The MODE bit in the INTSCR controls the triggering

sensitivity of the IRQ pin.

When an interrupt pin is edge-triggered only (MODE = 0), the interrupt remains set until a vector fetch,

software clear, or reset occurs.

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