MC68HC908GR4MP datasheet(120/286 Pages) FREESCALE

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External Interrupt (IRQ)

MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7

120

Freescale Semiconductor

12.6 IRQ Status and Control Register

The IRQ status and control register (INTSCR) controls and monitors operation of the IRQ module. The

INTSCR:

•

Shows the state of the IRQ flag

•

Clears the IRQ latch

•

Masks IRQ interrupt request

•

Controls triggering sensitivity of the IRQ interrupt pin

IRQF — IRQ Flag Bit

This read-only status bit is high when the IRQ interrupt is pending.

1 = IRQ interrupt pending

0 = IRQ interrupt not pending

ACK — IRQ Interrupt Request Acknowledge Bit

Writing a 1 to this write-only bit clears the IRQ latch. ACK always reads as logic 0. Reset clears ACK.

IMASK — IRQ Interrupt Mask Bit

Writing a 1 to this read/write bit disables IRQ interrupt requests. Reset clears IMASK.

1 = IRQ interrupt requests disabled

0 = IRQ interrupt requests enabled

MODE — IRQ Edge/Level Select Bit

This read/write bit controls the triggering sensitivity of the IRQ pin. Reset clears MODE.

1 = IRQ interrupt requests on falling edges and low levels

0 = IRQ interrupt requests on falling edges only

Address:

$001D

Bit 7

654321

Bit 0

Read:

0000

IRQF

IMASK

MODE

Write:

ACK

Reset:

00000000

= Unimplemented

Figure 12-3. IRQ Status and Control Register (INTSCR)

MC68HC908GR4MP Datasheet(PDF) 120 Page - Freescale Semiconductor, Inc

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