SST26VF016B-104VSLASHSN datasheet(24/84 Pages) MICROCHIP

24 / 84 page

SST26VF016B

DS20005262G-page 24



2014-2022 Microchip Technology Inc. and its subsidiaries

5.14 JEDEC ID Read (SPI Protocol)

Using traditional SPI protocol, the JEDEC ID Read

instruction identifies the device as SST26VF016B and

the manufacturer as Microchip®. To execute a JECEC

ID operation, the host drives CE# low, then sends the

JEDEC ID command cycle (9FH).

Immediately

following

the

command

cycle,

SST26VF016B output data on the falling edge of the

SCK signal. The data output stream is continuous until

terminated by a low-to-high transition on CE#. The

device outputs three bytes of data: manufacturer,

device type and device ID (see Table 5-4). See

Figure 5-16 for instruction sequence.

FIGURE 5-16:

JEDEC ID SEQUENCE (SPI)

5.15 Read Quad J-ID Read (SQI

Protocol)

The Read Quad J-ID Read instruction identifies the

device as SST26VF016B and manufacturer as Micro-

chip. To execute a Quad J-ID operation, the host drives

CE# low and then sends the Quad J-ID command cycle

(AFH). Each cycle is two nibbles (clocks) long, most

significant nibble first.

Immediately following the command cycle and one

dummy cycle, SST26VF016B outputs data on the fall-

ing edge of the SCK signal. The data output stream is

continuous until terminated by a low-to-high transition

of CE#. The device outputs three bytes of data: manu-

facturer, device type and device ID (see Table 5-4).

See Figure 5-17 for instruction sequence.

FIGURE 5-17:

QUAD J-ID READ SEQUENCE

TABLE 5-4:

DEVICE ID DATA OUTPUT

Product

Manufacturer ID (Byte 1)

Device ID

Device Type (Byte 2)

Device ID (Byte 3)

SST26VF016B

BFH

26H

41H

Device ID

CE#

SCK

012345678

High-Impedance

15 16

28 29 30 31

MODE 3

MODE 0

MSb

9 10 11 1213

1718

19 20 21 22 23

24 25 26 27

Note:

MSN = Most significant Nibble; LSN= Least Significant Nibble, C{1:0] = AFH

BFH

Device ID

Dummy

BFH

MSN

LSN

26H

SCK

SIO[3:0]

CE#

913

MODE 3

MODE 0

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