SST26VF016B-104VSLASHSN datasheet(72/84 Pages) MICROCHIP

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SST26VF016B

DS20005262G-page 72

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5FH

A30:A24

38H

Suspend In-progress Erase Maximum Latency

Maximum time required by the Flash device to suspend an in-progress

erase and be ready to accept another command which accesses the

Flash array.

Maximum latency = 25 µs

Erase maximum latency =.(count+1)*units

units (00b: 128 ns,

01b: 1 µs, 10b: 8 µs, 11b: 64 µs)

A28:A24 = count = 24 =

11000b

A30:A29 = 1 µs =

01b

A31

Suspend/Resume supported

0: supported

1: not supported

JEDEC Flash Parameter Table: 13th DWORD

60H

A7:A0

30H

Program Resume Instruction

61H

A15:A8

B0H

Program Suspend Instruction

62H

A23:A16

30H

Resume Instruction

63H

A31:A24

B0H

Suspend Instruction

JEDEC Flash Parameter Table: 14th DWORD

64H

A1:A0

F7H

Reserved = 11b

A7:A2

STATUS Register Polling Device Busy

111101b: Use of legacy polling is supported by reading the STATUS reg-

ister with 05h instruction and checking WIP bit [0] (0 = ready, 1 = busy).

65H

A14:A8

A9H

Exit Deep Power-down to next operation delay: 10 µs

Delay = (count+1)*unit

A12:A8 = count = 9 = 01001b

A14:A13 units = 01b = 1 µs

A15

Exit Power-down Instruction: ABH =

10101011b

A15 = 1b

66H

A22:A16

D5H

A22:A16 =

1010101b

A23

Enter Power-down instruction: B9H =

10111001b

A23 = 1b

67H

A30:A24

5CH

A30:A24 =

1011100

A31

Deep Power-down Supported

0: supported

1: not supported

JEDEC Flash Parameter Table: 15th DWORD

68H

A3:A0

29H

4-4-4 Mode Disable Sequences

Xxx1b: issue FF instruction.

1xxxb: issue the Soft Reset 66/99 sequence.

A7:A4

4-4-4 mode enable sequences

X_xx1xb: issue instruction 38h.

TABLE 11-1:

SERIAL FLASH DISCOVERABLE PARAMETER (SFDP) (CONTINUED) (9 OF 17)

Address

Bit Address

Data

Comments

Note 1: See Section 11.1 “Mapping Guidance Details” for more detailed mapping information.

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