MCP3460RT-ESLASH2LX datasheet(47/103 Pages) MICROCHIP

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DS20006975A page 47

MCP3460R

Proper decoupling ceramic capacitors (0.1 µF and

10 µF ceramic) should be placed as close as possible

to the power supply pins (AVDD, DVDD) to provide

additional transient immunity.

During Full Shutdown mode, the power supply voltages

are not monitored to be able to reach ultra-low power

consumption. The device cannot generate a POR event

interrupt in this mode, except for cases of extremely

low-power supply voltages. See Section 5.10.1 “Full

Shutdown Mode”.

In order to ensure a proper power-up sequence, the

ramp rate of DVDD must not exceed 3 V/µs when

coming out of the POR state.

FIGURE 5-10:

Power-on Reset Timing Diagram.

5.9

ADC Operating Modes

The ADC can be placed into three different operating

modes: ADC Shutdown, Standby and Conversion. The

ADC operating mode is controlled by the user through

the ADC_MODE[1:0] bits in the CONFIG0 register. The

user can directly launch conversions or place the ADC

into ADC Shutdown or Standby mode by writing these

bits. Additional Fast commands are available for each

of the three possible states of these bits to allow faster

programming in case of time-sensitive applications

(see

Section 6.2.4

“Command-Type

Bits

(CMD[1:0])”). Table 5-9 describes the available ADC_-

MODE[1:0] bits setting.

The ADC_MODE[1:0] bits do not give an instantaneous

representation

the ADC

state.

Writing

the

ADC_MODE[1:0] bits sets the desired state of the ADC,

but this state is only attained after a start-up time

depending on the current state of the ADC (see

Section 5.11 “ADC Start-up Timer” for details about

the start-up timer). Typically, the device starts in ADC

Shutdown mode after a POR (ADC_MODE[1:0] = 00 by

default). To launch conversions in the desired

configuration, the user should program the part in the

desired configuration and then set the ADC_MODE[1:0]

bits to ‘11’. In this case, the first conversion starts after

TADC_SETUP = 256 DMCLK periods. This time is

necessary for the MCP3460R to adjust to the new

programmed settings and settle in to its operating point

to accurately convert the input signals.

Internally, the MCP3460R tracks the current state of

the ADC, as well as the start-up timer counter, to be

able to optimize the start-up time depending on the

desired transitions and internal configurations required

and set by the user.

In MUX mode, overwriting the ADC_MODE[1:0] bits to

‘11’ when the ADC is already in conversion resets and

restarts the current conversion immediately. The

conversion start pulse will also be regenerated if the

EN_STP bit is enabled.

In Scan mode (see Section 5.15 “Scan Mode”),

writing the ADC_MODE[1:0] bits to ‘11’ starts the

conversion Scan cycle. During the complete cycle,

even when the Scan timer is enabled, reading the

ADC_MODE[1:0] bits gives a ‘11’ code output,

meaning that the Scan cycle is ongoing. Rewriting

ADC_MODE[1:0] = 11 during Scan mode resets

immediately and restarts the entire Scan sequence

from the beginning. The conversion start pulse will also

be regenerated if the EN_STP bit is enabled. The

restart of the Scan sequence can induce a TADC_SETUP

additional delay if the ADC is in ADC Shutdown mode

when the ADC_MODE bits are overwritten (this can

happen if the ADC_MODE bits are overwritten during

the timer delay period, where the ADC is placed into

ADC Shutdown mode in between two Scan cycles).

The ADCDATA register is always updated with the last

conversion results. The ADCDATA register cannot

provide incomplete conversion results. The A/D

conversion must be completed to be able to provide a

POR State

POR Threshold Up

POR Threshold Down

tPOR

Voltage

(AVDD, DVDD)

POR State

Time

Normal Operation

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