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MCP3460RT-E/2LX Datasheet(PDF) 67 Page - Microchip Technology |
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MCP3460RT-E/2LX Datasheet(HTML) 67 Page - Microchip Technology |
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67 / 103 page ![]() 2025 Microchip Technology Inc. and its subsidiaries DS20006975A page 67 MCP3460R FIGURE 6-8: Static and Incremental Read SPI Communications. If the COMMAND byte defines a Static Read of the ADCDATA register (address: 0x0), the ADC data will be present on SDO and will be updated continuously at each read. In this case, when a data ready interrupt occurs within a read, the data are not corrupted and will be updated to a new value after the old value has been completely read. The ADC register contains a double buffer that prevents data from being corrupted while reading it. The part is able to stream output data continuously with no additional command if the communication is not stopped with a CS rising edge. Figure 6-9 represents the continuous streaming of incoming ADCDATA through the SPI port with both SPI Modes 0,0 and 1,1. Don’t Care SCK SDI SDO CS 8x Depends on ADDR ADDR ... ADDR CMD[7:6] + ADDR + 01 Complete READ sequence ADDR Depends on ADDR ... Depends on ADDR Don’t Care 00XXXXXX Depends on IRQ status and device address High-Z 0 COMMAND BYTE Don’t Care SCK SDI SDO CS 8x Depends on ADDR ADDR ... ADDR = 0xF CMD[7:6] + ADDR + 11 Complete READ sequence ADDR + 1 Depends on ADDR+1 ... 16x Depends on Data Format ADDR = 0x0 ... Complete READ sequence ADDR = 0x1 8x ... 16x ADDR = 0xF Don’t Care ADDR ... 0xF Complete READ sequence Roll-over ADDRESS SET 00XXXXXX Depends on IRQ status and device address 0x0 ... High-Z 0 COMMAND BYTE Static Read Sequence Incremental Read Sequence |
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