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M65KG256AB Datasheet(PDF) 13 Page - STMicroelectronics

Part # M65KG256AB
Description  256Mbit (4 Banks x 4M x 16) 1.8V Supply, 133MHz Clock Rate, DDR Low Power SDRAM
PDF  51 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M65KG256AB Datasheet(HTML) 13 Page - STMicroelectronics

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M65KG256AB
3 Commands
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3.3
Bank(Row) Activate command (ACT)
The Bank(Row) Activate command is used to switch a row in a specific bank of the device from
the Idle to the active mode. The bank is selected by BA0 and BA1 and the row by A0 to A12
(see Table 2: Bank Selection using BA0-BA1).
This command is initiated by driving KE High, VIH, with E and RAS Low, VIL, and CAS and W
High.
A minimum delay of tRC is required after issuing the Bank (Row) Activate command prior to
initiating Read and Write operations from and to the active bank.
A minimum time of tRC is required between two Bank(Row) Activate commands to the same
bank (see Figure 6: Consecutive Bank(Row) Activate Command).
3.4
Read command (READ)
The Read command is used to read from the memory array in Burst Read mode. In this mode,
data is output in bursts synchronized with the cross points of the clock signals, K and K.
The start address of the Burst Read is determined by the column address, A0 to A12, and the
bank address, BA0-BA1, at the beginning of the Burst Read operation. A valid Read command
is initiated by driving E and CAS Low, VIL, and W and RAS High, VIH.
3.5
Read with Auto Precharge (READA)
This command is identical to the Read command except that a precharge is automatically
performed at the end of the Read operation. The precharge starts tRPD (Burst Length/2 clock
periods) after the Read with Auto Precharge command is input.
A tRAS(min) delay elapses between the Bank (Row) Activate and the Auto Precharge
commands. This lock-out mechanism allows a Read with auto Precharge command to be
issued to a bank that has been activated (opened) but has not yet satisfied the tRAS(min)
requirement.
The DDR LPSDRAM supports the Concurrent Auto Precharge mode: a Read with auto-
precharge can be followed by any command to another active bank, as long as that command
does not interrupt the read data transfer, and that all other related limitations apply (e.g.
contention between read data and written data must be avoided). Table 4: Minimum Delay
Between two Commands in Concurrent Auto Precharge Mode shows the minimum delays
between a Read with Auto Precharge command to one bank and a command to a different
bank.
Refer to Figure 10 for a description of Read operation with Auto Precharge.
3.6
Burst Read Terminate command (BST)
The Burst Read Terminate command is used to terminate a Burst Read operation.
It is issued with KE held High, by driving E and W Low and CAS and RAS High. tBSTZ after
issuing the Burst Read Terminate command, DQ0-DQ15 and LDQS, UDQS revert to the high
impedance state (see Figure 12: Burst Terminate During Read Operation).
There is no such command for Burst Write operations.



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