| Electronic Components Datasheet Search |
|
M65KG256AB Datasheet(PDF) 14 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
M65KG256AB Datasheet(HTML) 14 Page - STMicroelectronics |
|
14 / 51 page ![]() 3 Commands M65KG256AB 14/51 3.7 Write command (WRIT) This Write command is used to write to the memory array in Burst Write mode. In this mode, data is input synchronized with the cross points of the clock signals, K and K. The start address of the Burst Write is determined by the column address, A0 to A12, and the address of the selected bank, BA0-BA1, at the beginning of the Burst Read operation. A valid Write command is initiated by driving E, CAS and W Low, VIL, and RAS High, VIH. 3.8 Write with Auto Precharge command (WRITA) This command is identical to the Write command except that a precharge is automatically performed at the end of the Write operation. The precharge starts tWPD (Burst Length/2 +3 clock periods) after the Write with Auto Precharge command is input. Refer to Figure 16 for a description of Write operation with Auto Precharge. 3.9 Precharge Selected Bank/Precharge All Banks command (PRE/ PALL) The Precharge Selected Bank and Precharge All Banks are used to place the bank selected by BA0 and BA1 (see Table 2: Bank Selection using BA0-BA1) and all banks in idle mode, respectively. The precharge commands are issued by driving E, RAS and W Low, with CAS and KE held High. The value on A10 determines whether either the selected bank or all the banks will be precharged: ● If A10 is High, BA0-BA1 are Don’t Care and all the banks are precharged. ● If A10 is Low when, only the bank selected by BA0-BA1 is precharged. The bank(s) is/are placed in the Idle mode tRP after issuing the Precharge command. Once the bank is in Idle mode, the Bank (Row) Activate command has to be issued to switch the bank back to active mode. The precharge commands can be issued during Burst Read or Burst Write in which case the Burst Read or Write operation is terminated and the selected bank placed in Idle mode. The device needs to be in Idle mode before entering Self Refresh, Auto Refresh, Power-Down and Deep Power-Down. 3.10 Self Refresh Entry command (SELF) The Self Refresh Entry command is used to start a Self Refresh operation. Before starting a Self Refresh, the device must be idle. The Self Refresh Entry command is issued by driving KE Low, with E, RAS, and CAS Low, and W High (see Figure 25: Self Refresh Entry and Exit Commands AC Waveforms). During the Self Refresh operation, the internal memory controller generated the addresses of the row to be refreshed. The Self Refresh operation goes on as long as the Clock Enable signal, KE, is held Low. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |