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M65KG256AB Datasheet(PDF) 35 Page - STMicroelectronics

Part # M65KG256AB
Description  256Mbit (4 Banks x 4M x 16) 1.8V Supply, 133MHz Clock Rate, DDR Low Power SDRAM
PDF  51 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M65KG256AB Datasheet(HTML) 35 Page - STMicroelectronics

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M65KG256AB
7 DC and AC parameters
35/51
Figure 13. Write followed by Write in Same Bank and Row
1.
The consecutive WRIT command must be issued after a minimum delay of tCK to interrupt the previous Write operation.
2.
To issue the consecutive WRITE to a different row, precharge the bank (PRE) to interrupt the previous Write operation. tRP
after the PRE command, issue the ACT command. The consecutive WRIT command can be issued tRCD after the ACT
command.
ACT
WRIT
WRIT
Command
K
K
DIA0 DIA1
UDQS, LDQS
DQ0-DQ15
DIB0 DIB1
ai11207
Note: 1. Burst Length = 4
2. Bank = Bank A
NOP
Row
Column B
Address
BA0-BA1
NOP
Column A
DIB2
Bank A
Active
Data Written to
Column A
Data Written to
Column B
DIB3
tRCD



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