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PIC16F18344-I/SS Datasheet(PDF) 36 Page - Microchip Technology |
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PIC16F18344-I/SS Datasheet(HTML) 36 Page - Microchip Technology |
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36 / 489 page ![]() Bank 6 CPU CORE REGISTERS; see Table 4-2 for specifics 30Ch SLRCONA ― ― SLRA5 SLRA4 ― SLRA2 SLRA1 SLRA0 --11 -111 --11 -111 30Dh SLRCONB X ― Unimplemented ― ― ― X SLRB7 SLRB6 SLRB5 SLRB4 ― ― ― ― 1111 ---- 1111 ---- 30Eh SLRCONC X ― ― ― SLRC5 SLRC4 SLRC3 SLRC2 SLRC1 SLRC0 --11 1111 --11 1111 ― X SLRC7 SLRC6 SLRC5 SLRC4 SLRC3 SLRC2 SLRC1 SLRC0 1111 1111 1111 1111 30Fh ― ― Unimplemented ― ― 310h ― ― Unimplemented ― ― 311h CCPR3L CCPR3<7:0> xxxx xxxx xxxx xxxx 312h CCPR3H CCPR3<15:8> xxxx xxxx xxxx xxxx 313h CCP3CON CCP3EN ― CCP3OUT CCP3FMT CCP3MODE<3:0> 0-x0 0000 0-x0 0000 314h CCP3CAP ― ― ― ― CCP3CTS<3:0> ---- 0000 ---- xxxx 315h CCPR4L CCPR4<7:0> xxxx xxxx xxxx xxxx 316h CCPR4H CCPR4<15:8> xxxx xxxx xxxx xxxx 317h CCP4CON CCP4EN ― CCP4OUT CCP4FMT CCP4MODE<3:0> 0-x0 0000 0-x0 0000 318h CCP4CAP ― ― ― ― CCP4CTS<3:0> ---- 0000 ---- xxxx 319h to 31Fh ― ― Unimplemented ― ― TABLE 4-4: SPECIAL FUNCTION REGISTER SUMMARY BANKS 0-31 (CONTINUED) Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on: POR, BOR Value on all other Resets Legend: x = unknown, u = unchanged, q =depends on condition, - = unimplemented, read as ‘0’, r = reserved. Shaded locations unimplemented, read as ‘0’. Note 1: Only on PIC16F18324/18344. 2: Register accessible from both User and ICD Debugger. |
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