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PIC16F18344-I/SS Datasheet(PDF) 43 Page - Microchip Technology |
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PIC16F18344-I/SS Datasheet(HTML) 43 Page - Microchip Technology |
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43 / 489 page ![]() Bank 14 CPU CORE REGISTERS; see Table 4-2 for specifics 70Ch ― ― Unimplemented ― ― 70Dh ― ― Unimplemented ― ― 70Eh ― ― Unimplemented ― ― 70Fh ― ― Unimplemented ― ― 710h ― ― Unimplemented ― ― 711h CWG2CLKCON ― ― ― ― ― ― ― CS ---- ---0 ---- ---0 712h CWG2DAT ― ― ― ― DAT<3:0> ---- 0000 ---- 0000 713h CWG2DBR ― ― DBR<5:0> --00 0000 --00 0000 714h CWG2DBF ― ― DBF<5:0> --00 0000 --00 0000 715h CWG2CON0 EN LD ― ― ― MODE<2:0> 00-- -000 00-- -000 716h CWG2CON1 ― ― IN ― POLD POLC POLB POLA --x- 0000 --x- 0000 717h CWG2AS0 SHUTDOWN REN LSBD<1:0> LSAC<1:0> ― ― 0001 01-- 0001 01-- 718h CWG2AS1 ― ― ― AS4E AS3E AS2E AS1E AS0E ---0 0000 ---0 0000 719h CWG2STR OVRD OVRC OVRB OVRA STRD STRC STRB STRA 0000 0000 0000 0000 71Ah to 71Fh ― ― Unimplemented ― ― TABLE 4-4: SPECIAL FUNCTION REGISTER SUMMARY BANKS 0-31 (CONTINUED) Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on: POR, BOR Value on all other Resets Legend: x = unknown, u = unchanged, q =depends on condition, - = unimplemented, read as ‘0’, r = reserved. Shaded locations unimplemented, read as ‘0’. Note 1: Only on PIC16F18324/18344. 2: Register accessible from both User and ICD Debugger. |
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