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PIC16F18344-I/SS Datasheet(PDF) 38 Page - Microchip Technology |
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PIC16F18344-I/SS Datasheet(HTML) 38 Page - Microchip Technology |
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38 / 489 page ![]() Bank 7 CPU CORE REGISTERS; see Table 4-2 for specifics 39Ah CLKRCON CLKREN ― ― CLKRDC<1:0> CLKRDIV<2:0> 0--1 0000 0--1 0001 39Bh ― ― Unimplemented ― ― 39Ch MDCON MDEN ― ― MDOPOL MDOUT ― ― MDBIT 0--0 0--0 0--0 0--0 39Dh MDSRC ― ― ― ― MDMS<3:0> ---- xxxx 0--- uuuu 39Eh MDCARH ― MDCHPOL MDCHSYNC ― MDCH<3:0> -xx- xxxx -uu- uuuu 39Fh MDCARL ― MDCLPOL MDCLSYNC ― MDCL<3:0> -xx- xxxx -uu- uuuu TABLE 4-4: SPECIAL FUNCTION REGISTER SUMMARY BANKS 0-31 (CONTINUED) Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on: POR, BOR Value on all other Resets Legend: x = unknown, u = unchanged, q =depends on condition, - = unimplemented, read as ‘0’, r = reserved. Shaded locations unimplemented, read as ‘0’. Note 1: Only on PIC16F18324/18344. 2: Register accessible from both User and ICD Debugger. |
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