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PCIMX536AVV8B Datasheet(PDF) 153 Page - Freescale Semiconductor, Inc |
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PCIMX536AVV8B Datasheet(HTML) 153 Page - Freescale Semiconductor, Inc |
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153 / 180 page  Boot Mode Configuration i.MX53xA Automotive and Infotainment Applications Processors, Rev. 1 Freescale Semiconductor 153 5.2 Boot Devices Interfaces Allocation Table 109 lists the interfaces that can be used by the boot process in accordance with the specific boot mode configuration. The table also describes the interface’s specific modes and IOMUXC allocation, which are configured during boot when appropriate. EIM_A22 Input BOOT_CFG1[7]/Test Mode Selection Boot Options, Pin value overrides fuse settings for BT_FUSE_SEL = ‘0’. Signal Configuration as Fuse Override Input at Power Up. These are special I/O lines that control the boot up configuration during product development. In production, the boot configuration can be controlled by fuses. EIM_A21 Input BOOT_CFG1[6]/Test Mode Selection EIM_A20 Input BOOT_CFG1[5]/Test Mode Selection EIM_A19 Input BOOT_CFG1[4] EIM_A18 Input BOOT_CFG1[3] EIM_A17 Input BOOT_CFG1[2] EIM_A16 Input BOOT_CFG1[1] EIM_LBA Input BOOT_CFG1[0] EIM_EB0 Input BOOT_CFG2[7] EIM_EB1 Input BOOT_CFG2[6] EIM_DA0 Input BOOT_CFG2[5] EIM_DA1 Input BOOT_CFG2[4] EIM_DA2 Input BOOT_CFG2[3] EIM_DA3 Input BOOT_CFG2[2] EIM_DA4 Input BOOT_CFG3[7] EIM_DA5 Input BOOT_CFG3[6] EIM_DA6 Input BOOT_CFG3[5] EIM_DA7 Input BOOT_CFG3[4] EIM_DA8 Input BOOT_CFG3[3] EIM_DA9 Input BOOT_CFG3[2] EIM_DA10 Input BOOT_CFG3[1] Table 110. Interfaces Allocation During Boot Interface IP Instance Allocated Pads During Boot Comment SPI CSPI EIM_A25, EIM_D21, EIM_D22, EIM_D28 Only SS1 is supported SPI ECSPI-1 EIM_D[19:16] Only SS1 is supported SPI ECSPI-2 CSI_DAT[10:8], EIM_LBA Only SS1 is supported Table 109. Fuses and Associated Pins Used for Boot (continued) Pin Direction at Reset E-Fuse Name Details |
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