WM8956CGEFLSLASHV datasheet(34/80 Pages) WOLFSON

34 / 80 page

WM8956

Production Data

PD, November 2011, Rev 4.1

To avoid clipping at speaker supply, SPKVDD1 and SPKVDD2 must be high enough to support the

peak output voltage when using DCGAIN and ACGAIN functions. The peak output voltage is

AVDD*(DCGAIN+ACGAIN)/2.

DCGAIN should normally be set to the same value as ACGAIN.

See "Volume Updates" for more information on volume update bits, zero cross and timeout operation.

See "Class D Speaker Outputs" for more information on class D speaker operation.

OUT3 OUTPUT

The OUT3 pin can drive a 16

 or 32 headphone or a line output or be used as a pseudo-ground for

capless headphone drive (see Headphone Output section). It can also drive out a mono mix of left

and right output mixers (See Output Signal Path).

ENABLING THE OUTPUTS

Each analogue output of the WM8956 can be independently enabled or disabled. The analogue mixer

associated with each output is powered on or off along with the output pin. All outputs are disabled by

default. To save power, unused outputs should remain disabled.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R26 (1Ah)

Power

Management

(2)

LOUT1

LOUT1 Output Enable

ROUT1

ROUT1 Output Enable

SPKL

SPK_LP and SPK_LN Volume Control

Enable

SPKR

SPK_RP and SPK_RN Volume Control

Enable

OUT3

OUT3 Enable

R49 (31h)

Class D

Control (1)

7:6

SPK_OP_EN

[1:0]

Enable Class D Speaker Outputs

00 = Off

01 = Left speaker only

10 = Right speaker only

11 = Left and right speakers enabled

Note: All “Enable” bits are 1 = ON, 0 = OFF

Table 20 Analogue Output Control

WM8956CGEFL/V Datasheet(PDF) 34 Page - Wolfson Microelectronics plc

WM8956CGEFL/V Datasheet(HTML) 34 Page - Wolfson Microelectronics plc

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