WM8956CGEFLSLASHV datasheet(40/80 Pages) WOLFSON

40 / 80 page

WM8956

Production Data

PD, November 2011, Rev 4.1

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R24 (18h)

Additional

Control (2)

HPSWEN

Headphone Switch Enable

0 = Headphone switch disabled

1 = Headphone switch enabled

HPSWPOL

Headphone Switch Polarity

0 = HPDETECT high = headphone

1 = HPDETECT high = speaker

R27 (1Bh)

Additional

Control (3)

OUT3CAP

Capless Mode Headphone Switch

Enable

0 = OUT3 unaffected by jack detect

events

1 = OUT3 enabled and disabled together

with HP_L and HP_R in response to jack

detect events

R48 (30h)

Additional

Control (4)

3:2

HPSEL[1:0]

Headphone Switch Input Select

0X = GPIO1 used for jack detect input

(Requires pin to be configured as a

GPIO using ALRCGPIO)

10 = JD2 used for jack detect input

11 = JD3 used for jack detect input

R23 (17h)

Additional

Control (1)

TOEN

Slow Clock Enable (Must be enabled for

jack detect de-bounce)

0 = Slow Clock Disabled

1 = Slow Clock Enabled

TOCLKSEL

Slow Clock Selection (Used for volume

update timeouts and for jack detect

debounce)

0 = SYSCLK / 2

21 (Slower Response)

1 = SYSCLK / 2

19 (Faster Response)

Table 24 Headphone Jack Detect

Figure 20 Example Headset Detection Circuit using Normally-Open Switch

Figure 21 Example Headset Detection Circuit using Normally-Closed Switch

WM8956CGEFL/V Datasheet(PDF) 40 Page - Wolfson Microelectronics plc

WM8956CGEFL/V Datasheet(HTML) 40 Page - Wolfson Microelectronics plc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80

Datasheet Download

Link URL