UPSD3312D datasheet(202/272 Pages) STMICROELECTRONICS

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Doc ID 9685 Rev 7

logic where more product terms may be available. The following list summarizes how

product terms are allocated to each OMC, as shown in Table 122 on page 203.

●

MCELLAB0-MCELLAB7 each have three native product terms and may borrow up to

six more

●

MCELLBC0-MCELLBC3 each have four native product terms and may borrow up to

five more

●

MCELLBC4-MCELLBC7 each have four native product terms and may borrow up to six

more.

Native product terms come from the AND-OR Array. Each OMC may borrow product terms

only from certain other OMCs, if they are not in use. Product term allocation does not add

any propagation delay to the logic. The fitter report generated by PSDsoft Express will show

any PT allocation that has occurred.

If an equation requires more product terms than are available to it through PT allocation,

then “external” product terms are required, which consumes other OMCs. This is called

product term expansion and also happens automatically in PSDsoft Express as needed. PT

expansion causes additional propagation delay because an additional OMC is consumed by

the expansion process and it’s output is rerouted (or fed back) into the AND-OR array. The

user can examine the fitter report generated by PSDsoft Express to see resulting PT

allocation and PT expansion (expansion will have signal names, such as ‘*.fb_0’ or ‘*.fb_1’).

PSDsoft Express will always try to fit the logic design first by using PT allocation, and if that

is not sufficient then PSDsoft Express will use PT expansion.

Product term expansion may occur in the DPLD for complex chip select equations for Flash

memory sectors and for SRAM, but this is a rare occurrence. If PSDsoft Express does use

PT expansion in the DPLD, it results in an approximate 15ns additional propagation delay for

that chip select signal, which gives 15ns less time for the memory to respond. Be aware of

this and consider adding a wait state to the 8032 bus access (using the SFR named,

BUSCON), or lower the 8032 clock frequency to avoid problems with memory access time.

Figure 66.

OMC allocator

PortC pins

Port B pins

Port A pins

(80-pin pkg only)

OMC Bank BC (MCELLBC0-7)

OMC Bank AB (MCELLAB0-7)

32 1 0

* = Used for JTAG,

pin not available

to GPLD

AI09177

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